1*9880d681SAndroid Build Coastguard Worker; RUN: llc -O0 < %s -march=ppc64 -mcpu=ppc64 | FileCheck -check-prefix=OPT0 %s 2*9880d681SAndroid Build Coastguard Worker; RUN: llc -O1 < %s -march=ppc64 -mcpu=ppc64 | FileCheck -check-prefix=OPT1 %s 3*9880d681SAndroid Build Coastguard Worker; RUN: llc -O0 < %s -march=ppc32 -mcpu=ppc | FileCheck -check-prefix=OPT0-PPC32 %s 4*9880d681SAndroid Build Coastguard Worker 5*9880d681SAndroid Build Coastguard Workertarget triple = "powerpc64-unknown-linux-gnu" 6*9880d681SAndroid Build Coastguard Worker 7*9880d681SAndroid Build Coastguard Worker@a = thread_local global i32 0, align 4 8*9880d681SAndroid Build Coastguard Worker 9*9880d681SAndroid Build Coastguard Worker;OPT0-LABEL: localexec: 10*9880d681SAndroid Build Coastguard Worker;OPT1-LABEL: localexec: 11*9880d681SAndroid Build Coastguard Workerdefine i32 @localexec() nounwind { 12*9880d681SAndroid Build Coastguard Workerentry: 13*9880d681SAndroid Build Coastguard Worker;OPT0: addis [[REG1:[0-9]+]], 13, a@tprel@ha 14*9880d681SAndroid Build Coastguard Worker;OPT0-NEXT: li [[REG2:[0-9]+]], 42 15*9880d681SAndroid Build Coastguard Worker;OPT0-NEXT: addi [[REG1]], [[REG1]], a@tprel@l 16*9880d681SAndroid Build Coastguard Worker;OPT0: stw [[REG2]], 0([[REG1]]) 17*9880d681SAndroid Build Coastguard Worker;OPT1: addis [[REG1:[0-9]+]], 13, a@tprel@ha 18*9880d681SAndroid Build Coastguard Worker;OPT1-NEXT: li [[REG2:[0-9]+]], 42 19*9880d681SAndroid Build Coastguard Worker;OPT1-NEXT: stw [[REG2]], a@tprel@l([[REG1]]) 20*9880d681SAndroid Build Coastguard Worker store i32 42, i32* @a, align 4 21*9880d681SAndroid Build Coastguard Worker ret i32 0 22*9880d681SAndroid Build Coastguard Worker} 23*9880d681SAndroid Build Coastguard Worker 24*9880d681SAndroid Build Coastguard Worker; Test correct assembly code generation for thread-local storage 25*9880d681SAndroid Build Coastguard Worker; using the initial-exec model. 26*9880d681SAndroid Build Coastguard Worker 27*9880d681SAndroid Build Coastguard Worker@a2 = external thread_local global i32 28*9880d681SAndroid Build Coastguard Worker 29*9880d681SAndroid Build Coastguard Workerdefine signext i32 @main2() nounwind { 30*9880d681SAndroid Build Coastguard Workerentry: 31*9880d681SAndroid Build Coastguard Worker %retval = alloca i32, align 4 32*9880d681SAndroid Build Coastguard Worker store i32 0, i32* %retval 33*9880d681SAndroid Build Coastguard Worker %0 = load i32, i32* @a2, align 4 34*9880d681SAndroid Build Coastguard Worker ret i32 %0 35*9880d681SAndroid Build Coastguard Worker} 36*9880d681SAndroid Build Coastguard Worker 37*9880d681SAndroid Build Coastguard Worker; OPT1-LABEL: main2: 38*9880d681SAndroid Build Coastguard Worker; OPT1: addis [[REG1:[0-9]+]], 2, a2@got@tprel@ha 39*9880d681SAndroid Build Coastguard Worker; OPT1: ld [[REG2:[0-9]+]], a2@got@tprel@l([[REG1]]) 40*9880d681SAndroid Build Coastguard Worker; OPT1: add {{[0-9]+}}, [[REG2]], a2@tls 41*9880d681SAndroid Build Coastguard Worker 42*9880d681SAndroid Build Coastguard Worker;OPT0-PPC32-LABEL: main2: 43*9880d681SAndroid Build Coastguard Worker;OPT0-PPC32: li [[REG1:[0-9]+]], _GLOBAL_OFFSET_TABLE_@l 44*9880d681SAndroid Build Coastguard Worker;OPT0-PPC32: addis [[REG1]], [[REG1]], _GLOBAL_OFFSET_TABLE_@ha 45*9880d681SAndroid Build Coastguard Worker;OPT0-PPC32: lwz [[REG2:[0-9]+]], a2@got@tprel@l([[REG1]]) 46*9880d681SAndroid Build Coastguard Worker;OPT0-PPC32: add 3, [[REG2]], a2@tls 47