xref: /aosp_15_r20/external/llvm/test/CodeGen/PowerPC/rlwimi-and-or-bits.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s | FileCheck %s
2*9880d681SAndroid Build Coastguard Workertarget datalayout = "E-m:e-i64:64-n32:64"
3*9880d681SAndroid Build Coastguard Workertarget triple = "powerpc64-unknown-linux-gnu"
4*9880d681SAndroid Build Coastguard Worker
5*9880d681SAndroid Build Coastguard Worker@m = external global i32, align 4
6*9880d681SAndroid Build Coastguard Worker
7*9880d681SAndroid Build Coastguard Worker; Function Attrs: nounwind
8*9880d681SAndroid Build Coastguard Workerdefine signext i32 @main() #0 {
9*9880d681SAndroid Build Coastguard Workerentry:
10*9880d681SAndroid Build Coastguard Worker
11*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: @main
12*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: rlwimi
13*9880d681SAndroid Build Coastguard Worker; CHECK: andi
14*9880d681SAndroid Build Coastguard Worker
15*9880d681SAndroid Build Coastguard Worker  %0 = load i32, i32* @m, align 4
16*9880d681SAndroid Build Coastguard Worker  %or = or i32 %0, 250
17*9880d681SAndroid Build Coastguard Worker  store i32 %or, i32* @m, align 4
18*9880d681SAndroid Build Coastguard Worker  %and = and i32 %or, 249
19*9880d681SAndroid Build Coastguard Worker  %sub.i = sub i32 %and, 0
20*9880d681SAndroid Build Coastguard Worker  %sext = shl i32 %sub.i, 24
21*9880d681SAndroid Build Coastguard Worker  %conv = ashr exact i32 %sext, 24
22*9880d681SAndroid Build Coastguard Worker  ret i32 %conv
23*9880d681SAndroid Build Coastguard Worker}
24*9880d681SAndroid Build Coastguard Worker
25*9880d681SAndroid Build Coastguard Workerattributes #0 = { nounwind "target-cpu"="pwr7" }
26*9880d681SAndroid Build Coastguard Workerattributes #1 = { nounwind }
27*9880d681SAndroid Build Coastguard Worker
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