xref: /aosp_15_r20/external/llvm/test/CodeGen/PowerPC/memset-nc.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s | FileCheck %s
2*9880d681SAndroid Build Coastguard Worker; RUN: llc -O0 < %s | FileCheck %s -check-prefix=CHECK-O0
3*9880d681SAndroid Build Coastguard Workertarget datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
4*9880d681SAndroid Build Coastguard Workertarget triple = "powerpc64-bgq-linux"
5*9880d681SAndroid Build Coastguard Worker
6*9880d681SAndroid Build Coastguard Worker; Function Attrs: nounwind
7*9880d681SAndroid Build Coastguard Workerdefine void @test_qpx() unnamed_addr #0 align 2 {
8*9880d681SAndroid Build Coastguard Workerentry:
9*9880d681SAndroid Build Coastguard Worker  %0 = load i32, i32* undef, align 4
10*9880d681SAndroid Build Coastguard Worker  %1 = trunc i32 %0 to i8
11*9880d681SAndroid Build Coastguard Worker  call void @llvm.memset.p0i8.i64(i8* null, i8 %1, i64 64, i32 32, i1 false)
12*9880d681SAndroid Build Coastguard Worker  ret void
13*9880d681SAndroid Build Coastguard Worker
14*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: @test_qpx
15*9880d681SAndroid Build Coastguard Worker; CHECK: qvstfdx
16*9880d681SAndroid Build Coastguard Worker; CHECK: qvstfdx
17*9880d681SAndroid Build Coastguard Worker; CHECK: blr
18*9880d681SAndroid Build Coastguard Worker
19*9880d681SAndroid Build Coastguard Worker; CHECK-O0-LABEL: @test_qpx
20*9880d681SAndroid Build Coastguard Worker; CHECK-O0-NOT: qvstfdx
21*9880d681SAndroid Build Coastguard Worker; CHECK-O0: blr
22*9880d681SAndroid Build Coastguard Worker}
23*9880d681SAndroid Build Coastguard Worker
24*9880d681SAndroid Build Coastguard Worker; Function Attrs: nounwind
25*9880d681SAndroid Build Coastguard Workerdeclare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) #1
26*9880d681SAndroid Build Coastguard Worker
27*9880d681SAndroid Build Coastguard Worker; Function Attrs: nounwind
28*9880d681SAndroid Build Coastguard Workerdefine void @test_vsx() unnamed_addr #2 align 2 {
29*9880d681SAndroid Build Coastguard Workerentry:
30*9880d681SAndroid Build Coastguard Worker  %0 = load i32, i32* undef, align 4
31*9880d681SAndroid Build Coastguard Worker  %1 = trunc i32 %0 to i8
32*9880d681SAndroid Build Coastguard Worker  call void @llvm.memset.p0i8.i64(i8* null, i8 %1, i64 32, i32 1, i1 false)
33*9880d681SAndroid Build Coastguard Worker  ret void
34*9880d681SAndroid Build Coastguard Worker
35*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: @test_vsx
36*9880d681SAndroid Build Coastguard Worker; CHECK: stxvw4x
37*9880d681SAndroid Build Coastguard Worker; CHECK: stxvw4x
38*9880d681SAndroid Build Coastguard Worker; CHECK: blr
39*9880d681SAndroid Build Coastguard Worker
40*9880d681SAndroid Build Coastguard Worker; CHECK-O0-LABEL: @test_vsx
41*9880d681SAndroid Build Coastguard Worker; CHECK-O0-NOT: stxvw4x
42*9880d681SAndroid Build Coastguard Worker; CHECK-O0: blr
43*9880d681SAndroid Build Coastguard Worker}
44*9880d681SAndroid Build Coastguard Worker
45*9880d681SAndroid Build Coastguard Workerattributes #0 = { nounwind "target-cpu"="a2q" }
46*9880d681SAndroid Build Coastguard Workerattributes #1 = { nounwind }
47*9880d681SAndroid Build Coastguard Workerattributes #2 = { nounwind "target-cpu"="pwr7" }
48*9880d681SAndroid Build Coastguard Worker
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