xref: /aosp_15_r20/external/llvm/test/CodeGen/PowerPC/direct-move-profit.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc -O2 -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown < %s | FileCheck %s
2*9880d681SAndroid Build Coastguard Worker
3*9880d681SAndroid Build Coastguard Worker; Function Attrs: norecurse nounwind
4*9880d681SAndroid Build Coastguard Workerdefine void @test1(float* noalias nocapture %a, i32* noalias nocapture readonly %b, i32* nocapture readnone %c, i32 signext %n) #0 {
5*9880d681SAndroid Build Coastguard Worker
6*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: test1
7*9880d681SAndroid Build Coastguard Worker
8*9880d681SAndroid Build Coastguard Workerentry:
9*9880d681SAndroid Build Coastguard Worker  %idxprom = sext i32 %n to i64
10*9880d681SAndroid Build Coastguard Worker  %arrayidx = getelementptr inbounds i32, i32* %b, i64 %idxprom
11*9880d681SAndroid Build Coastguard Worker  %0 = load i32, i32* %arrayidx, align 4, !tbaa !1
12*9880d681SAndroid Build Coastguard Worker  %conv = sitofp i32 %0 to float
13*9880d681SAndroid Build Coastguard Worker  %mul = fmul float %conv, 0x4002916880000000
14*9880d681SAndroid Build Coastguard Worker  %arrayidx2 = getelementptr inbounds float, float* %a, i64 %idxprom
15*9880d681SAndroid Build Coastguard Worker  store float %mul, float* %arrayidx2, align 4, !tbaa !5
16*9880d681SAndroid Build Coastguard Worker  ret void
17*9880d681SAndroid Build Coastguard Worker
18*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: mtvsrwa
19*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: mtfprwa
20*9880d681SAndroid Build Coastguard Worker; CHECK: lxsiwax [[REG:[0-9]+]], {{.*}}
21*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: mtvsrwa
22*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: mtfprwa
23*9880d681SAndroid Build Coastguard Worker; CHECK: xscvsxdsp {{.*}}, [[REG]]
24*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: mtvsrwa
25*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: mtfprwa
26*9880d681SAndroid Build Coastguard Worker; CHECK: blr
27*9880d681SAndroid Build Coastguard Worker
28*9880d681SAndroid Build Coastguard Worker}
29*9880d681SAndroid Build Coastguard Worker
30*9880d681SAndroid Build Coastguard Worker; Function Attrs: norecurse nounwind readonly
31*9880d681SAndroid Build Coastguard Workerdefine float @test2(i32* nocapture readonly %b) #0 {
32*9880d681SAndroid Build Coastguard Worker
33*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: test2
34*9880d681SAndroid Build Coastguard Worker
35*9880d681SAndroid Build Coastguard Workerentry:
36*9880d681SAndroid Build Coastguard Worker  %0 = load i32, i32* %b, align 4, !tbaa !1
37*9880d681SAndroid Build Coastguard Worker  %conv = sitofp i32 %0 to float
38*9880d681SAndroid Build Coastguard Worker  %mul = fmul float %conv, 0x40030A3D80000000
39*9880d681SAndroid Build Coastguard Worker  ret float %mul
40*9880d681SAndroid Build Coastguard Worker
41*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: mtvsrwa
42*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: mtfprwa
43*9880d681SAndroid Build Coastguard Worker; CHECK: lxsiwax [[REG:[0-9]+]], {{.*}}
44*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: mtvsrwa
45*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: mtfprwa
46*9880d681SAndroid Build Coastguard Worker; CHECK: xscvsxdsp {{.*}}, [[REG]]
47*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: mtvsrwa
48*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: mtfprwa
49*9880d681SAndroid Build Coastguard Worker; CHECK: blr
50*9880d681SAndroid Build Coastguard Worker
51*9880d681SAndroid Build Coastguard Worker}
52*9880d681SAndroid Build Coastguard Worker
53*9880d681SAndroid Build Coastguard Worker; Function Attrs: norecurse nounwind
54*9880d681SAndroid Build Coastguard Workerdefine void @test3(float* noalias nocapture %a, i32* noalias nocapture readonly %b, i32* noalias nocapture %c, i32 signext %n) #0 {
55*9880d681SAndroid Build Coastguard Worker
56*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: test3
57*9880d681SAndroid Build Coastguard Worker
58*9880d681SAndroid Build Coastguard Workerentry:
59*9880d681SAndroid Build Coastguard Worker  %idxprom = sext i32 %n to i64
60*9880d681SAndroid Build Coastguard Worker  %arrayidx = getelementptr inbounds i32, i32* %b, i64 %idxprom
61*9880d681SAndroid Build Coastguard Worker  %0 = load i32, i32* %arrayidx, align 4, !tbaa !1
62*9880d681SAndroid Build Coastguard Worker  %conv = sitofp i32 %0 to float
63*9880d681SAndroid Build Coastguard Worker  %mul = fmul float %conv, 0x4002916880000000
64*9880d681SAndroid Build Coastguard Worker  %arrayidx2 = getelementptr inbounds float, float* %a, i64 %idxprom
65*9880d681SAndroid Build Coastguard Worker  store float %mul, float* %arrayidx2, align 4, !tbaa !5
66*9880d681SAndroid Build Coastguard Worker  %arrayidx6 = getelementptr inbounds i32, i32* %c, i64 %idxprom
67*9880d681SAndroid Build Coastguard Worker  %1 = load i32, i32* %arrayidx6, align 4, !tbaa !1
68*9880d681SAndroid Build Coastguard Worker  %add = add nsw i32 %1, %0
69*9880d681SAndroid Build Coastguard Worker  store i32 %add, i32* %arrayidx6, align 4, !tbaa !1
70*9880d681SAndroid Build Coastguard Worker  ret void
71*9880d681SAndroid Build Coastguard Worker
72*9880d681SAndroid Build Coastguard Worker; CHECK: mtvsrwa
73*9880d681SAndroid Build Coastguard Worker; CHECK: blr
74*9880d681SAndroid Build Coastguard Worker
75*9880d681SAndroid Build Coastguard Worker}
76*9880d681SAndroid Build Coastguard Worker
77*9880d681SAndroid Build Coastguard Worker!0 = !{!"clang version 3.9.0 (http://llvm.org/git/clang.git b88a395e7ba26c0fb96cd99a2a004d76f4f41d0c) (http://llvm.org/git/llvm.git 1ac3fbac0f5b037c17c0b0f9d271c32c4d7ca1b5)"}
78*9880d681SAndroid Build Coastguard Worker!1 = !{!2, !2, i64 0}
79*9880d681SAndroid Build Coastguard Worker!2 = !{!"int", !3, i64 0}
80*9880d681SAndroid Build Coastguard Worker!3 = !{!"omnipotent char", !4, i64 0}
81*9880d681SAndroid Build Coastguard Worker!4 = !{!"Simple C++ TBAA"}
82*9880d681SAndroid Build Coastguard Worker!5 = !{!6, !6, i64 0}
83*9880d681SAndroid Build Coastguard Worker!6 = !{!"float", !3, i64 0}
84