xref: /aosp_15_r20/external/llvm/test/CodeGen/Mips/selTBtnezSlti.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic < %s | FileCheck %s -check-prefix=16
2*9880d681SAndroid Build Coastguard Worker
3*9880d681SAndroid Build Coastguard Worker@i = global i32 1, align 4
4*9880d681SAndroid Build Coastguard Worker@j = global i32 2, align 4
5*9880d681SAndroid Build Coastguard Worker@a = global i32 5, align 4
6*9880d681SAndroid Build Coastguard Worker@.str = private unnamed_addr constant [9 x i8] c"%i = 2 \0A\00", align 1
7*9880d681SAndroid Build Coastguard Worker@k = common global i32 0, align 4
8*9880d681SAndroid Build Coastguard Worker
9*9880d681SAndroid Build Coastguard Workerdefine void @t() nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" {
10*9880d681SAndroid Build Coastguard Workerentry:
11*9880d681SAndroid Build Coastguard Worker  %0 = load i32, i32* @a, align 4
12*9880d681SAndroid Build Coastguard Worker  %cmp = icmp slt i32 %0, 10
13*9880d681SAndroid Build Coastguard Worker  %1 = load i32, i32* @j, align 4
14*9880d681SAndroid Build Coastguard Worker  %2 = load i32, i32* @i, align 4
15*9880d681SAndroid Build Coastguard Worker  %cond = select i1 %cmp, i32 %1, i32 %2
16*9880d681SAndroid Build Coastguard Worker  store i32 %cond, i32* @i, align 4
17*9880d681SAndroid Build Coastguard Worker  ret void
18*9880d681SAndroid Build Coastguard Worker}
19*9880d681SAndroid Build Coastguard Worker
20*9880d681SAndroid Build Coastguard Workerattributes #0 = { nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" }
21*9880d681SAndroid Build Coastguard Worker
22*9880d681SAndroid Build Coastguard Worker; 16:	slti	${{[0-9]+}}, 10
23*9880d681SAndroid Build Coastguard Worker; 16:	btnez	$BB{{[0-9]+}}_{{[0-9]}}
24*9880d681SAndroid Build Coastguard Worker
25*9880d681SAndroid Build Coastguard Worker
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