1*9880d681SAndroid Build Coastguard Worker; 2*9880d681SAndroid Build Coastguard Worker; Register constraint "r" shouldn't take long long unless 3*9880d681SAndroid Build Coastguard Worker; The target is 64 bit. 4*9880d681SAndroid Build Coastguard Worker; 5*9880d681SAndroid Build Coastguard Worker; 6*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=mips64el -mcpu=mips64r2 -target-abi=n64 < %s | FileCheck %s 7*9880d681SAndroid Build Coastguard Worker 8*9880d681SAndroid Build Coastguard Worker 9*9880d681SAndroid Build Coastguard Workerdefine i32 @main() nounwind { 10*9880d681SAndroid Build Coastguard Workerentry: 11*9880d681SAndroid Build Coastguard Worker 12*9880d681SAndroid Build Coastguard Worker 13*9880d681SAndroid Build Coastguard Worker; r with long long 14*9880d681SAndroid Build Coastguard Worker;CHECK: #APP 15*9880d681SAndroid Build Coastguard Worker;CHECK: addiu ${{[0-9]+}}, ${{[0-9]+}}, 3 16*9880d681SAndroid Build Coastguard Worker;CHECK: #NO_APP 17*9880d681SAndroid Build Coastguard Worker tail call i64 asm sideeffect "addiu $0, $1, $2", "=r,r,i"(i64 7, i64 3) nounwind 18*9880d681SAndroid Build Coastguard Worker ret i32 0 19*9880d681SAndroid Build Coastguard Worker} 20*9880d681SAndroid Build Coastguard Worker 21