xref: /aosp_15_r20/external/llvm/test/CodeGen/Mips/inlineasm-assembler-directives.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=mips < %s | FileCheck %s
2*9880d681SAndroid Build Coastguard Worker
3*9880d681SAndroid Build Coastguard Worker; Check for the emission of appropriate assembler directives before and
4*9880d681SAndroid Build Coastguard Worker; after the inline assembly code.
5*9880d681SAndroid Build Coastguard Workerdefine void @f() nounwind {
6*9880d681SAndroid Build Coastguard Workerentry:
7*9880d681SAndroid Build Coastguard Worker; CHECK:      #APP
8*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: .set  push
9*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: .set  at
10*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: .set  macro
11*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: .set  reorder
12*9880d681SAndroid Build Coastguard Worker; CHECK:      addi $9, ${{[2-9][0-9]?}}, 8
13*9880d681SAndroid Build Coastguard Worker; CHECK:      ori ${{[2-9][0-9]?}}, $9, 6
14*9880d681SAndroid Build Coastguard Worker; CHECK:      .set  pop
15*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: #NO_APP
16*9880d681SAndroid Build Coastguard Worker  %a = alloca i32, align 4
17*9880d681SAndroid Build Coastguard Worker  %b = alloca i32, align 4
18*9880d681SAndroid Build Coastguard Worker  store i32 20, i32* %a, align 4
19*9880d681SAndroid Build Coastguard Worker  %0 = load i32, i32* %a, align 4
20*9880d681SAndroid Build Coastguard Worker  %1 = call i32 asm sideeffect "addi $$9, $1, 8\0A\09ori $0, $$9, 6", "=r,r,~{$1}"(i32 %0)
21*9880d681SAndroid Build Coastguard Worker  store i32 %1, i32* %b, align 4
22*9880d681SAndroid Build Coastguard Worker  ret void
23*9880d681SAndroid Build Coastguard Worker}
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