1*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -march=mipsel -mcpu=mips32r2 | FileCheck %s -check-prefix=MIPS32 2*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -march=mips64el -mcpu=mips64r2 | FileCheck %s -check-prefix=MIPS64 3*9880d681SAndroid Build Coastguard Worker 4*9880d681SAndroid Build Coastguard Workerdeclare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1) 5*9880d681SAndroid Build Coastguard Worker 6*9880d681SAndroid Build Coastguard Workerdefine <2 x i32> @ctlzv2i32(<2 x i32> %x) { 7*9880d681SAndroid Build Coastguard Workerentry: 8*9880d681SAndroid Build Coastguard Worker; MIPS32: clz $2, $4 9*9880d681SAndroid Build Coastguard Worker; MIPS32: clz $3, $5 10*9880d681SAndroid Build Coastguard Worker 11*9880d681SAndroid Build Coastguard Worker; MIPS64-DAG: sll $[[A0:[0-9]+]], $4, 0 12*9880d681SAndroid Build Coastguard Worker; MIPS64-DAG: clz $2, $[[A0]] 13*9880d681SAndroid Build Coastguard Worker; MIPS64-DAG: sll $[[A1:[0-9]+]], $5, 0 14*9880d681SAndroid Build Coastguard Worker; MIPS64-DAG: clz $3, $[[A1]] 15*9880d681SAndroid Build Coastguard Worker 16*9880d681SAndroid Build Coastguard Worker %ret = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %x, i1 true) 17*9880d681SAndroid Build Coastguard Worker ret <2 x i32> %ret 18*9880d681SAndroid Build Coastguard Worker} 19*9880d681SAndroid Build Coastguard Worker 20