xref: /aosp_15_r20/external/llvm/test/CodeGen/MIR/Generic/register-info.mir (revision 9880d6810fe72a1726cb53787c6711e909410d58)

# RUN: llc -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses machine register info properties
# correctly.

--- |

  define i32 @foo() {
  entry:
    ret i32 0
  }

  define i32 @bar() {
  start:
    ret i32 0
  }

...
---
# CHECK: name: foo
# CHECK:      isSSA: false
# CHECK-NEXT: tracksRegLiveness: false
# CHECK-NEXT: tracksSubRegLiveness: false
# CHECK: ...
name:            foo
body: |
  bb.0:
...
---
# CHECK: name: bar
# CHECK:      isSSA: false
# CHECK-NEXT: tracksRegLiveness: true
# CHECK-NEXT: tracksSubRegLiveness: true
# CHECK: ...
name: bar
isSSA: false
tracksRegLiveness: true
tracksSubRegLiveness: true
body: |
  bb.0:
...