1*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=hexagon -mcpu=hexagonv5 -disable-hexagon-misched < %s \ 2*9880d681SAndroid Build Coastguard Worker; RUN: | FileCheck %s 3*9880d681SAndroid Build Coastguard Worker; Check that we generate new value jump, both registers, with one 4*9880d681SAndroid Build Coastguard Worker; of the registers as new. 5*9880d681SAndroid Build Coastguard Worker 6*9880d681SAndroid Build Coastguard Worker@Reg = common global i32 0, align 4 7*9880d681SAndroid Build Coastguard Workerdefine i32 @main() nounwind { 8*9880d681SAndroid Build Coastguard Workerentry: 9*9880d681SAndroid Build Coastguard Worker; CHECK: if (cmp.gt(r{{[0-9]+}}, r{{[0-9]+}}.new)) jump:{{[t|nt]}} .LBB{{[0-9]+}}_{{[0-9]+}} 10*9880d681SAndroid Build Coastguard Worker %Reg2 = alloca i32, align 4 11*9880d681SAndroid Build Coastguard Worker %0 = load i32, i32* %Reg2, align 4 12*9880d681SAndroid Build Coastguard Worker %1 = load i32, i32* @Reg, align 4 13*9880d681SAndroid Build Coastguard Worker %tobool = icmp sle i32 %0, %1 14*9880d681SAndroid Build Coastguard Worker br i1 %tobool, label %if.then, label %if.else 15*9880d681SAndroid Build Coastguard Worker 16*9880d681SAndroid Build Coastguard Workerif.then: 17*9880d681SAndroid Build Coastguard Worker call void @bar(i32 1, i32 2) 18*9880d681SAndroid Build Coastguard Worker br label %if.end 19*9880d681SAndroid Build Coastguard Worker 20*9880d681SAndroid Build Coastguard Workerif.else: 21*9880d681SAndroid Build Coastguard Worker call void @baz(i32 10, i32 20) 22*9880d681SAndroid Build Coastguard Worker br label %if.end 23*9880d681SAndroid Build Coastguard Worker 24*9880d681SAndroid Build Coastguard Workerif.end: 25*9880d681SAndroid Build Coastguard Worker ret i32 0 26*9880d681SAndroid Build Coastguard Worker} 27*9880d681SAndroid Build Coastguard Worker 28*9880d681SAndroid Build Coastguard Workerdeclare void @bar(i32, i32) 29*9880d681SAndroid Build Coastguard Workerdeclare void @baz(i32, i32) 30