xref: /aosp_15_r20/external/llvm/test/CodeGen/Hexagon/bit-gen-rseq.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=hexagon -disable-hsdr -hexagon-subreg-liveness < %s | FileCheck %s
2*9880d681SAndroid Build Coastguard Worker; Check that we don't generate any bitwise operations.
3*9880d681SAndroid Build Coastguard Worker
4*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: = or(
5*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: = and(
6*9880d681SAndroid Build Coastguard Worker
7*9880d681SAndroid Build Coastguard Workertarget triple = "hexagon"
8*9880d681SAndroid Build Coastguard Worker
9*9880d681SAndroid Build Coastguard Workerdefine i32 @fred(i32* nocapture readonly %p, i32 %n) #0 {
10*9880d681SAndroid Build Coastguard Workerentry:
11*9880d681SAndroid Build Coastguard Worker  %t.sroa.0.048 = load i32, i32* %p, align 4
12*9880d681SAndroid Build Coastguard Worker  %cmp49 = icmp ugt i32 %n, 1
13*9880d681SAndroid Build Coastguard Worker  br i1 %cmp49, label %for.body, label %for.end
14*9880d681SAndroid Build Coastguard Worker
15*9880d681SAndroid Build Coastguard Workerfor.body:                                         ; preds = %entry, %for.body
16*9880d681SAndroid Build Coastguard Worker  %t.sroa.0.052 = phi i32 [ %t.sroa.0.0, %for.body ], [ %t.sroa.0.048, %entry ]
17*9880d681SAndroid Build Coastguard Worker  %t.sroa.11.051 = phi i64 [ %t.sroa.11.0.extract.shift, %for.body ], [ 0, %entry ]
18*9880d681SAndroid Build Coastguard Worker  %i.050 = phi i32 [ %inc, %for.body ], [ 1, %entry ]
19*9880d681SAndroid Build Coastguard Worker  %t.sroa.0.0.insert.ext = zext i32 %t.sroa.0.052 to i64
20*9880d681SAndroid Build Coastguard Worker  %t.sroa.0.0.insert.insert = or i64 %t.sroa.0.0.insert.ext, %t.sroa.11.051
21*9880d681SAndroid Build Coastguard Worker  %0 = tail call i64 @llvm.hexagon.A2.addp(i64 %t.sroa.0.0.insert.insert, i64 %t.sroa.0.0.insert.insert)
22*9880d681SAndroid Build Coastguard Worker  %t.sroa.11.0.extract.shift = and i64 %0, -4294967296
23*9880d681SAndroid Build Coastguard Worker  %arrayidx4 = getelementptr inbounds i32, i32* %p, i32 %i.050
24*9880d681SAndroid Build Coastguard Worker  %inc = add nuw i32 %i.050, 1
25*9880d681SAndroid Build Coastguard Worker  %t.sroa.0.0 = load i32, i32* %arrayidx4, align 4
26*9880d681SAndroid Build Coastguard Worker  %exitcond = icmp eq i32 %inc, %n
27*9880d681SAndroid Build Coastguard Worker  br i1 %exitcond, label %for.end, label %for.body
28*9880d681SAndroid Build Coastguard Worker
29*9880d681SAndroid Build Coastguard Workerfor.end:                                          ; preds = %for.body, %entry
30*9880d681SAndroid Build Coastguard Worker  %t.sroa.0.0.lcssa = phi i32 [ %t.sroa.0.048, %entry ], [ %t.sroa.0.0, %for.body ]
31*9880d681SAndroid Build Coastguard Worker  %t.sroa.11.0.lcssa = phi i64 [ 0, %entry ], [ %t.sroa.11.0.extract.shift, %for.body ]
32*9880d681SAndroid Build Coastguard Worker  %t.sroa.0.0.insert.ext17 = zext i32 %t.sroa.0.0.lcssa to i64
33*9880d681SAndroid Build Coastguard Worker  %t.sroa.0.0.insert.insert19 = or i64 %t.sroa.0.0.insert.ext17, %t.sroa.11.0.lcssa
34*9880d681SAndroid Build Coastguard Worker  %1 = tail call i64 @llvm.hexagon.A2.addp(i64 %t.sroa.0.0.insert.insert19, i64 %t.sroa.0.0.insert.insert19)
35*9880d681SAndroid Build Coastguard Worker  %t.sroa.11.0.extract.shift41 = lshr i64 %1, 32
36*9880d681SAndroid Build Coastguard Worker  %t.sroa.11.0.extract.trunc42 = trunc i64 %t.sroa.11.0.extract.shift41 to i32
37*9880d681SAndroid Build Coastguard Worker  ret i32 %t.sroa.11.0.extract.trunc42
38*9880d681SAndroid Build Coastguard Worker}
39*9880d681SAndroid Build Coastguard Worker
40*9880d681SAndroid Build Coastguard Workerdeclare i64 @llvm.hexagon.A2.addp(i64, i64) #1
41*9880d681SAndroid Build Coastguard Worker
42*9880d681SAndroid Build Coastguard Workerattributes #0 = { norecurse nounwind readonly }
43*9880d681SAndroid Build Coastguard Workerattributes #1 = { nounwind readnone }
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