1*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=hexagon -enable-aa-sched-mi < %s 2*9880d681SAndroid Build Coastguard Worker; REQUIRES: asserts 3*9880d681SAndroid Build Coastguard Worker 4*9880d681SAndroid Build Coastguard Worker; Make sure the base is a register and not an address. 5*9880d681SAndroid Build Coastguard Worker 6*9880d681SAndroid Build Coastguard Workerdefine fastcc void @Get_lsp_pol(i32* nocapture %f) #0 { 7*9880d681SAndroid Build Coastguard Workerentry: 8*9880d681SAndroid Build Coastguard Worker %f5 = alloca i32, align 4 9*9880d681SAndroid Build Coastguard Worker %arrayidx103 = getelementptr inbounds i32, i32* %f, i32 4 10*9880d681SAndroid Build Coastguard Worker store i32 0, i32* %arrayidx103, align 4 11*9880d681SAndroid Build Coastguard Worker %f5.0.load185 = load volatile i32, i32* %f5, align 4 12*9880d681SAndroid Build Coastguard Worker ret void 13*9880d681SAndroid Build Coastguard Worker} 14*9880d681SAndroid Build Coastguard Worker 15*9880d681SAndroid Build Coastguard Workerattributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } 16