xref: /aosp_15_r20/external/llvm/test/CodeGen/ARM/subreg-remat.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -relocation-model=pic -disable-fp-elim -mcpu=cortex-a8 -pre-RA-sched=source -no-integrated-as | FileCheck %s
2*9880d681SAndroid Build Coastguard Workertarget triple = "thumbv7-apple-ios"
3*9880d681SAndroid Build Coastguard Worker; <rdar://problem/10032939>
4*9880d681SAndroid Build Coastguard Worker;
5*9880d681SAndroid Build Coastguard Worker; The vector %v2 is built like this:
6*9880d681SAndroid Build Coastguard Worker;
7*9880d681SAndroid Build Coastguard Worker;   %vreg6:ssub_1<def> = ...
8*9880d681SAndroid Build Coastguard Worker;   %vreg6:ssub_0<def> = VLDRS <cp#0>, 0, pred:14, pred:%noreg; mem:LD4[ConstantPool] DPR_VFP2:%vreg6
9*9880d681SAndroid Build Coastguard Worker;
10*9880d681SAndroid Build Coastguard Worker; When %vreg6 spills, the VLDRS constant pool load cannot be rematerialized
11*9880d681SAndroid Build Coastguard Worker; since it implicitly reads the ssub_1 sub-register.
12*9880d681SAndroid Build Coastguard Worker;
13*9880d681SAndroid Build Coastguard Worker; CHECK: f1
14*9880d681SAndroid Build Coastguard Worker; CHECK: vmov    d0, r0, r0
15*9880d681SAndroid Build Coastguard Worker; CHECK: vldr s1, LCPI
16*9880d681SAndroid Build Coastguard Worker; The vector must be spilled:
17*9880d681SAndroid Build Coastguard Worker; CHECK: vstr d0,
18*9880d681SAndroid Build Coastguard Worker; CHECK: asm clobber d0
19*9880d681SAndroid Build Coastguard Worker; And reloaded after the asm:
20*9880d681SAndroid Build Coastguard Worker; CHECK: vldr [[D16:d[0-9]+]],
21*9880d681SAndroid Build Coastguard Worker; CHECK: vstr [[D16]], [r1]
22*9880d681SAndroid Build Coastguard Workerdefine void @f1(float %x, <2 x float>* %p) {
23*9880d681SAndroid Build Coastguard Worker  %v1 = insertelement <2 x float> undef, float %x, i32 0
24*9880d681SAndroid Build Coastguard Worker  %v2 = insertelement <2 x float> %v1, float 0x400921FB60000000, i32 1
25*9880d681SAndroid Build Coastguard Worker  %y = call double asm sideeffect "asm clobber $0", "=w,0,~{d1},~{d2},~{d3},~{d4},~{d5},~{d6},~{d7},~{d8},~{d9},~{d10},~{d11},~{d12},~{d13},~{d14},~{d15},~{d16},~{d17},~{d18},~{d19},~{d20},~{d21},~{d22},~{d23},~{d24},~{d25},~{d26},~{d27},~{d28},~{d29},~{d30},~{d31}"(<2 x float> %v2) nounwind
26*9880d681SAndroid Build Coastguard Worker  store <2 x float> %v2, <2 x float>* %p, align 8
27*9880d681SAndroid Build Coastguard Worker  ret void
28*9880d681SAndroid Build Coastguard Worker}
29*9880d681SAndroid Build Coastguard Worker
30*9880d681SAndroid Build Coastguard Worker; On the other hand, when the partial redef doesn't read the full register
31*9880d681SAndroid Build Coastguard Worker; because the bits are undef, we should rematerialize.  The vector is now built
32*9880d681SAndroid Build Coastguard Worker; like this:
33*9880d681SAndroid Build Coastguard Worker;
34*9880d681SAndroid Build Coastguard Worker;   %vreg2:ssub_0<def> = VLDRS <cp#0>, 0, pred:14, pred:%noreg, %vreg2<imp-def>; mem:LD4[ConstantPool]
35*9880d681SAndroid Build Coastguard Worker;
36*9880d681SAndroid Build Coastguard Worker; The extra <imp-def> operand indicates that the instruction fully defines the
37*9880d681SAndroid Build Coastguard Worker; virtual register.  It doesn't read the old value.
38*9880d681SAndroid Build Coastguard Worker;
39*9880d681SAndroid Build Coastguard Worker; CHECK: f2
40*9880d681SAndroid Build Coastguard Worker; CHECK: vldr s0, LCPI
41*9880d681SAndroid Build Coastguard Worker; The vector must not be spilled:
42*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: vstr
43*9880d681SAndroid Build Coastguard Worker; CHECK: asm clobber d0
44*9880d681SAndroid Build Coastguard Worker; But instead rematerialize after the asm:
45*9880d681SAndroid Build Coastguard Worker; CHECK: vldr [[S0:s[0-9]+]], LCPI
46*9880d681SAndroid Build Coastguard Worker; CHECK: vstr [[D0:d[0-9]+]], [r0]
47*9880d681SAndroid Build Coastguard Workerdefine void @f2(<2 x float>* %p) {
48*9880d681SAndroid Build Coastguard Worker  %v2 = insertelement <2 x float> undef, float 0x400921FB60000000, i32 0
49*9880d681SAndroid Build Coastguard Worker  %y = call double asm sideeffect "asm clobber $0", "=w,0,~{d1},~{d2},~{d3},~{d4},~{d5},~{d6},~{d7},~{d8},~{d9},~{d10},~{d11},~{d12},~{d13},~{d14},~{d15},~{d16},~{d17},~{d18},~{d19},~{d20},~{d21},~{d22},~{d23},~{d24},~{d25},~{d26},~{d27},~{d28},~{d29},~{d30},~{d31}"(<2 x float> %v2) nounwind
50*9880d681SAndroid Build Coastguard Worker  store <2 x float> %v2, <2 x float>* %p, align 8
51*9880d681SAndroid Build Coastguard Worker  ret void
52*9880d681SAndroid Build Coastguard Worker}
53