xref: /aosp_15_r20/external/llvm/test/CodeGen/ARM/setcc-sentinals.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 -asm-verbose=false %s -o - | FileCheck %s
2*9880d681SAndroid Build Coastguard Worker
3*9880d681SAndroid Build Coastguard Workerdefine zeroext i1 @test0(i32 %x) nounwind {
4*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: test0:
5*9880d681SAndroid Build Coastguard Worker; CHECK: add [[REG:(r[0-9]+)|(lr)]], r0, #1
6*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: mov r0, #0
7*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: cmp [[REG]], #1
8*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: movwhi r0, #1
9*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: bx  lr
10*9880d681SAndroid Build Coastguard Worker  %cmp1 = icmp ne i32 %x, -1
11*9880d681SAndroid Build Coastguard Worker  %not.cmp = icmp ne i32 %x, 0
12*9880d681SAndroid Build Coastguard Worker  %.cmp1 = and i1 %cmp1, %not.cmp
13*9880d681SAndroid Build Coastguard Worker  ret i1 %.cmp1
14*9880d681SAndroid Build Coastguard Worker}
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