1*9880d681SAndroid Build Coastguard Worker; RUN: llc -mtriple=armv7-none-linux-gnueabi < %s | FileCheck %s 2*9880d681SAndroid Build Coastguard Worker; RUN: llc -mtriple=thumbv7-none-linux-gnueabi < %s | FileCheck %s 3*9880d681SAndroid Build Coastguard Worker; RUN: llc -mtriple=armv7-none-linux-gnueabi -mattr=-perfmon < %s | FileCheck %s --check-prefix=CHECK-NO-PERFMON 4*9880d681SAndroid Build Coastguard Worker; RUN: llc -mtriple=armv6-none-linux-gnueabi < %s | FileCheck %s --check-prefix=CHECK-NO-PERFMON 5*9880d681SAndroid Build Coastguard Worker 6*9880d681SAndroid Build Coastguard Worker; The performance monitor we're looking for is an ARMv7 extension. It should be 7*9880d681SAndroid Build Coastguard Worker; possible to disable it, but realistically present on at least every v7-A 8*9880d681SAndroid Build Coastguard Worker; processor (but not on v6, at least by default). 9*9880d681SAndroid Build Coastguard Worker 10*9880d681SAndroid Build Coastguard Workerdeclare i64 @llvm.readcyclecounter() 11*9880d681SAndroid Build Coastguard Worker 12*9880d681SAndroid Build Coastguard Workerdefine i64 @get_count() { 13*9880d681SAndroid Build Coastguard Worker %val = call i64 @llvm.readcyclecounter() 14*9880d681SAndroid Build Coastguard Worker ret i64 %val 15*9880d681SAndroid Build Coastguard Worker 16*9880d681SAndroid Build Coastguard Worker ; As usual, exact registers only sort of matter but the cycle-count had better 17*9880d681SAndroid Build Coastguard Worker ; end up in r0 in the end. 18*9880d681SAndroid Build Coastguard Worker 19*9880d681SAndroid Build Coastguard Worker; CHECK: mrc p15, #0, r0, c9, c13, #0 20*9880d681SAndroid Build Coastguard Worker; CHECK: {{movs?}} r1, #0 21*9880d681SAndroid Build Coastguard Worker 22*9880d681SAndroid Build Coastguard Worker; CHECK-NO-PERFMON: {{movs?}} r0, #0 23*9880d681SAndroid Build Coastguard Worker; CHECK-NO-PERFMON: {{movs?}} r1, #0 24*9880d681SAndroid Build Coastguard Worker} 25