1*9880d681SAndroid Build Coastguard Worker; RUN: llc -mtriple=thumb-none-macho -mcpu=arm7tdmi %s -o - | FileCheck %s 2*9880d681SAndroid Build Coastguard Worker; RUN: llc -mtriple=thumb-none-macho -mcpu=arm7tdmi %s -filetype=obj -o /dev/null 3*9880d681SAndroid Build Coastguard Worker 4*9880d681SAndroid Build Coastguard Workerdeclare void @callee() 5*9880d681SAndroid Build Coastguard Worker 6*9880d681SAndroid Build Coastguard Workerdefine void @test_call() { 7*9880d681SAndroid Build Coastguard Worker ; BX can only take a register before v5t came along, so we must materialise 8*9880d681SAndroid Build Coastguard Worker ; the address properly. 9*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: test_call: 10*9880d681SAndroid Build Coastguard Worker; CHECK: ldr r[[CALLEE_STUB:[0-9]+]], [[LITPOOL:LCPI[0-9]+_[0-9]+]] 11*9880d681SAndroid Build Coastguard Worker; CHECK: [[PC_LABEL:LPC[0-9]+_[0-9]+]]: 12*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: add r[[CALLEE_STUB]], pc 13*9880d681SAndroid Build Coastguard Worker; CHECK: ldr [[CALLEE:r[0-9]+]], [r[[CALLEE_STUB]]] 14*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: mov lr, pc 15*9880d681SAndroid Build Coastguard Worker; CHECK: bl [[INDIRECT_PAD:Ltmp[0-9]+]] 16*9880d681SAndroid Build Coastguard Worker 17*9880d681SAndroid Build Coastguard Worker; CHECK: [[LITPOOL]]: 18*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: .long L_callee$non_lazy_ptr-([[PC_LABEL]]+4) 19*9880d681SAndroid Build Coastguard Worker 20*9880d681SAndroid Build Coastguard Worker; CHECK: [[INDIRECT_PAD]]: 21*9880d681SAndroid Build Coastguard Worker; CHECK: bx [[CALLEE]] 22*9880d681SAndroid Build Coastguard Worker 23*9880d681SAndroid Build Coastguard Worker call void @callee() 24*9880d681SAndroid Build Coastguard Worker ret void 25*9880d681SAndroid Build Coastguard Worker} 26