xref: /aosp_15_r20/external/llvm/test/CodeGen/ARM/intrinsics-memory-barrier.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -mtriple=armv7 -mattr=+db | FileCheck %s
2*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -mtriple=thumbv7 -mattr=+db | FileCheck %s
3*9880d681SAndroid Build Coastguard Worker
4*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: test
5*9880d681SAndroid Build Coastguard Workerdefine void @test() {
6*9880d681SAndroid Build Coastguard Worker  call void @llvm.arm.dmb(i32 3)     ; CHECK: dmb osh
7*9880d681SAndroid Build Coastguard Worker  call void @llvm.arm.dsb(i32 7)     ; CHECK: dsb nsh
8*9880d681SAndroid Build Coastguard Worker  call void @llvm.arm.isb(i32 15)    ; CHECK: isb sy
9*9880d681SAndroid Build Coastguard Worker  ret void
10*9880d681SAndroid Build Coastguard Worker}
11*9880d681SAndroid Build Coastguard Worker
12*9880d681SAndroid Build Coastguard Worker; Important point is that the compiler should not reorder memory access
13*9880d681SAndroid Build Coastguard Worker; instructions around DMB.
14*9880d681SAndroid Build Coastguard Worker; Failure to do so, two STRs will collapse into one STRD.
15*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: test_dmb_reordering
16*9880d681SAndroid Build Coastguard Workerdefine void @test_dmb_reordering(i32 %a, i32 %b, i32* %d) {
17*9880d681SAndroid Build Coastguard Worker  store i32 %a, i32* %d              ; CHECK: str {{r[0-9]+}}, [{{r[0-9]+}}]
18*9880d681SAndroid Build Coastguard Worker
19*9880d681SAndroid Build Coastguard Worker  call void @llvm.arm.dmb(i32 15)    ; CHECK: dmb sy
20*9880d681SAndroid Build Coastguard Worker
21*9880d681SAndroid Build Coastguard Worker  %d1 = getelementptr i32, i32* %d, i32 1
22*9880d681SAndroid Build Coastguard Worker  store i32 %b, i32* %d1             ; CHECK: str {{r[0-9]+}}, [{{r[0-9]+}}, #4]
23*9880d681SAndroid Build Coastguard Worker
24*9880d681SAndroid Build Coastguard Worker  ret void
25*9880d681SAndroid Build Coastguard Worker}
26*9880d681SAndroid Build Coastguard Worker
27*9880d681SAndroid Build Coastguard Worker; Similarly for DSB.
28*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: test_dsb_reordering
29*9880d681SAndroid Build Coastguard Workerdefine void @test_dsb_reordering(i32 %a, i32 %b, i32* %d) {
30*9880d681SAndroid Build Coastguard Worker  store i32 %a, i32* %d              ; CHECK: str {{r[0-9]+}}, [{{r[0-9]+}}]
31*9880d681SAndroid Build Coastguard Worker
32*9880d681SAndroid Build Coastguard Worker  call void @llvm.arm.dsb(i32 15)    ; CHECK: dsb sy
33*9880d681SAndroid Build Coastguard Worker
34*9880d681SAndroid Build Coastguard Worker  %d1 = getelementptr i32, i32* %d, i32 1
35*9880d681SAndroid Build Coastguard Worker  store i32 %b, i32* %d1             ; CHECK: str {{r[0-9]+}}, [{{r[0-9]+}}, #4]
36*9880d681SAndroid Build Coastguard Worker
37*9880d681SAndroid Build Coastguard Worker  ret void
38*9880d681SAndroid Build Coastguard Worker}
39*9880d681SAndroid Build Coastguard Worker
40*9880d681SAndroid Build Coastguard Worker; And ISB.
41*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: test_isb_reordering
42*9880d681SAndroid Build Coastguard Workerdefine void @test_isb_reordering(i32 %a, i32 %b, i32* %d) {
43*9880d681SAndroid Build Coastguard Worker  store i32 %a, i32* %d              ; CHECK: str {{r[0-9]+}}, [{{r[0-9]+}}]
44*9880d681SAndroid Build Coastguard Worker
45*9880d681SAndroid Build Coastguard Worker  call void @llvm.arm.isb(i32 15)    ; CHECK: isb sy
46*9880d681SAndroid Build Coastguard Worker
47*9880d681SAndroid Build Coastguard Worker  %d1 = getelementptr i32, i32* %d, i32 1
48*9880d681SAndroid Build Coastguard Worker  store i32 %b, i32* %d1             ; CHECK: str {{r[0-9]+}}, [{{r[0-9]+}}, #4]
49*9880d681SAndroid Build Coastguard Worker
50*9880d681SAndroid Build Coastguard Worker  ret void
51*9880d681SAndroid Build Coastguard Worker}
52*9880d681SAndroid Build Coastguard Worker
53*9880d681SAndroid Build Coastguard Workerdeclare void @llvm.arm.dmb(i32)
54*9880d681SAndroid Build Coastguard Workerdeclare void @llvm.arm.dsb(i32)
55*9880d681SAndroid Build Coastguard Workerdeclare void @llvm.arm.isb(i32)
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