1*9880d681SAndroid Build Coastguard Worker; RUN: llc -mtriple=armv7-none-eabi -mattr=-neon,-vfpv2 %s -o - | FileCheck %s -check-prefix=novfp 2*9880d681SAndroid Build Coastguard Worker; RUN: llc -mtriple=armv7-none-eabi -mattr=+neon %s -float-abi=hard -o - | FileCheck %s -check-prefix=vfp 3*9880d681SAndroid Build Coastguard Worker 4*9880d681SAndroid Build Coastguard Worker; vfp-LABEL: f1 5*9880d681SAndroid Build Coastguard Worker; vfp-CHECK: vadd.f32 s0, s0, s0 6*9880d681SAndroid Build Coastguard Worker 7*9880d681SAndroid Build Coastguard Worker; In the novfp case, the compiler is forced to assign a core register. 8*9880d681SAndroid Build Coastguard Worker; Although this register class can't be used with the vadd.f32 instruction, 9*9880d681SAndroid Build Coastguard Worker; the compiler behaved as expected since it is allowed to emit anything. 10*9880d681SAndroid Build Coastguard Worker 11*9880d681SAndroid Build Coastguard Worker; novfp-LABEL: f1 12*9880d681SAndroid Build Coastguard Worker; novfp-CHECK: vadd.f32 r0, r0, r0 13*9880d681SAndroid Build Coastguard Worker 14*9880d681SAndroid Build Coastguard Worker; This can be generated by a function such as: 15*9880d681SAndroid Build Coastguard Worker; void f1(float f) {asm volatile ("add.f32 $0, $0, $0" : : "X" (f));} 16*9880d681SAndroid Build Coastguard Worker 17*9880d681SAndroid Build Coastguard Workerdefine arm_aapcs_vfpcc void @f1(float %f) { 18*9880d681SAndroid Build Coastguard Workerentry: 19*9880d681SAndroid Build Coastguard Worker call void asm sideeffect "vadd.f32 $0, $0, $0", "X" (float %f) nounwind 20*9880d681SAndroid Build Coastguard Worker ret void 21*9880d681SAndroid Build Coastguard Worker} 22