xref: /aosp_15_r20/external/llvm/test/CodeGen/ARM/ifcvt1.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 %s -o - | FileCheck %s -check-prefix=A8
2*9880d681SAndroid Build Coastguard Worker; RUN: llc -mtriple=arm-eabi -mcpu=swift %s -o - | FileCheck %s -check-prefix=SWIFT
3*9880d681SAndroid Build Coastguard Worker
4*9880d681SAndroid Build Coastguard Workerdefine i32 @t1(i32 %a, i32 %b) {
5*9880d681SAndroid Build Coastguard Worker; A8-LABEL: t1:
6*9880d681SAndroid Build Coastguard Worker; SWIFT-LABEL: t1:
7*9880d681SAndroid Build Coastguard Worker	%tmp2 = icmp eq i32 %a, 0
8*9880d681SAndroid Build Coastguard Worker	br i1 %tmp2, label %cond_false, label %cond_true
9*9880d681SAndroid Build Coastguard Worker
10*9880d681SAndroid Build Coastguard Workercond_true:
11*9880d681SAndroid Build Coastguard Worker; A8: subeq r0, r1, #1
12*9880d681SAndroid Build Coastguard Worker; SWIFT: sub r0, r1, #1
13*9880d681SAndroid Build Coastguard Worker	%tmp5 = add i32 %b, 1
14*9880d681SAndroid Build Coastguard Worker	ret i32 %tmp5
15*9880d681SAndroid Build Coastguard Worker
16*9880d681SAndroid Build Coastguard Workercond_false:
17*9880d681SAndroid Build Coastguard Worker; A8: addne r0, r1, #1
18*9880d681SAndroid Build Coastguard Worker; SWIFT: addne r0, r1, #1
19*9880d681SAndroid Build Coastguard Worker	%tmp7 = add i32 %b, -1
20*9880d681SAndroid Build Coastguard Worker	ret i32 %tmp7
21*9880d681SAndroid Build Coastguard Worker}
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