xref: /aosp_15_r20/external/llvm/test/CodeGen/ARM/carry.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc -mtriple=armv6t2-eabi %s -o - | FileCheck %s
2*9880d681SAndroid Build Coastguard Worker
3*9880d681SAndroid Build Coastguard Workerdefine i64 @f1(i64 %a, i64 %b) {
4*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f1:
5*9880d681SAndroid Build Coastguard Worker; CHECK: subs r
6*9880d681SAndroid Build Coastguard Worker; CHECK: sbc r
7*9880d681SAndroid Build Coastguard Workerentry:
8*9880d681SAndroid Build Coastguard Worker	%tmp = sub i64 %a, %b
9*9880d681SAndroid Build Coastguard Worker	ret i64 %tmp
10*9880d681SAndroid Build Coastguard Worker}
11*9880d681SAndroid Build Coastguard Worker
12*9880d681SAndroid Build Coastguard Workerdefine i64 @f2(i64 %a, i64 %b) {
13*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f2:
14*9880d681SAndroid Build Coastguard Worker; CHECK: lsl  r
15*9880d681SAndroid Build Coastguard Worker; CHECK: orr  r
16*9880d681SAndroid Build Coastguard Worker; CHECK: rsbs r
17*9880d681SAndroid Build Coastguard Worker; CHECK: sbc  r
18*9880d681SAndroid Build Coastguard Workerentry:
19*9880d681SAndroid Build Coastguard Worker        %tmp1 = shl i64 %a, 1
20*9880d681SAndroid Build Coastguard Worker	%tmp2 = sub i64 %tmp1, %b
21*9880d681SAndroid Build Coastguard Worker	ret i64 %tmp2
22*9880d681SAndroid Build Coastguard Worker}
23*9880d681SAndroid Build Coastguard Worker
24*9880d681SAndroid Build Coastguard Worker; add with live carry
25*9880d681SAndroid Build Coastguard Workerdefine i64 @f3(i32 %al, i32 %bl) {
26*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f3:
27*9880d681SAndroid Build Coastguard Worker; CHECK: adds r
28*9880d681SAndroid Build Coastguard Worker; CHECK: adc r
29*9880d681SAndroid Build Coastguard Workerentry:
30*9880d681SAndroid Build Coastguard Worker        ; unsigned wide add
31*9880d681SAndroid Build Coastguard Worker        %aw = zext i32 %al to i64
32*9880d681SAndroid Build Coastguard Worker        %bw = zext i32 %bl to i64
33*9880d681SAndroid Build Coastguard Worker        %cw = add i64 %aw, %bw
34*9880d681SAndroid Build Coastguard Worker        ; ch == carry bit
35*9880d681SAndroid Build Coastguard Worker        %ch = lshr i64 %cw, 32
36*9880d681SAndroid Build Coastguard Worker	%dw = add i64 %ch, %bw
37*9880d681SAndroid Build Coastguard Worker	ret i64 %dw
38*9880d681SAndroid Build Coastguard Worker}
39*9880d681SAndroid Build Coastguard Worker
40*9880d681SAndroid Build Coastguard Worker; rdar://10073745
41*9880d681SAndroid Build Coastguard Workerdefine i64 @f4(i64 %x) nounwind readnone {
42*9880d681SAndroid Build Coastguard Workerentry:
43*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f4:
44*9880d681SAndroid Build Coastguard Worker; CHECK: rsbs r
45*9880d681SAndroid Build Coastguard Worker; CHECK: rsc r
46*9880d681SAndroid Build Coastguard Worker  %0 = sub nsw i64 0, %x
47*9880d681SAndroid Build Coastguard Worker  ret i64 %0
48*9880d681SAndroid Build Coastguard Worker}
49*9880d681SAndroid Build Coastguard Worker
50*9880d681SAndroid Build Coastguard Worker; rdar://12559385
51*9880d681SAndroid Build Coastguard Workerdefine i64 @f5(i32 %vi) {
52*9880d681SAndroid Build Coastguard Workerentry:
53*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f5:
54*9880d681SAndroid Build Coastguard Worker; CHECK: movw [[REG:r[0-9]+]], #36102
55*9880d681SAndroid Build Coastguard Worker; CHECK: sbc r{{[0-9]+}}, r{{[0-9]+}}, [[REG]]
56*9880d681SAndroid Build Coastguard Worker    %v0 = zext i32 %vi to i64
57*9880d681SAndroid Build Coastguard Worker    %v1 = xor i64 %v0, -155057456198619
58*9880d681SAndroid Build Coastguard Worker    %v4 = add i64 %v1, 155057456198619
59*9880d681SAndroid Build Coastguard Worker    %v5 = add i64 %v4, %v1
60*9880d681SAndroid Build Coastguard Worker    ret i64 %v5
61*9880d681SAndroid Build Coastguard Worker}
62