xref: /aosp_15_r20/external/llvm/test/CodeGen/ARM/2012-05-04-vmov.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc -O1 -mtriple=arm-eabi -mcpu=cortex-a9 %s -o - \
2*9880d681SAndroid Build Coastguard Worker; RUN:  | FileCheck -check-prefix=A9-CHECK %s
3*9880d681SAndroid Build Coastguard Worker
4*9880d681SAndroid Build Coastguard Worker; RUN: llc -O1 -mtriple=arm-eabi -mcpu=swift %s -o - \
5*9880d681SAndroid Build Coastguard Worker; RUN:  | FileCheck -check-prefix=SWIFT-CHECK %s
6*9880d681SAndroid Build Coastguard Worker
7*9880d681SAndroid Build Coastguard Worker; Check that swift doesn't use vmov.32. <rdar://problem/10453003>.
8*9880d681SAndroid Build Coastguard Worker
9*9880d681SAndroid Build Coastguard Workerdefine <2 x i32> @testuvec(<2 x i32> %A, <2 x i32> %B) nounwind {
10*9880d681SAndroid Build Coastguard Workerentry:
11*9880d681SAndroid Build Coastguard Worker  %div = udiv <2 x i32> %A, %B
12*9880d681SAndroid Build Coastguard Worker  ret <2 x i32> %div
13*9880d681SAndroid Build Coastguard Worker; A9-CHECK: vmov.32
14*9880d681SAndroid Build Coastguard Worker; vmov.32 should not be used to get a lane:
15*9880d681SAndroid Build Coastguard Worker; vmov.32 <dst>, <src>[<lane>].
16*9880d681SAndroid Build Coastguard Worker; but vmov.32 <dst>[<lane>], <src> is fine.
17*9880d681SAndroid Build Coastguard Worker; SWIFT-CHECK-NOT: vmov.32 {{r[0-9]+}}, {{d[0-9]\[[0-9]+\]}}
18*9880d681SAndroid Build Coastguard Worker}
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