xref: /aosp_15_r20/external/llvm/test/CodeGen/ARM/2012-03-26-FoldImmBug.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 | FileCheck %s
2*9880d681SAndroid Build Coastguard Worker
3*9880d681SAndroid Build Coastguard Worker; ARM has a peephole optimization which looks for a def / use pair. The def
4*9880d681SAndroid Build Coastguard Worker; produces a 32-bit immediate which is consumed by the use. It tries to
5*9880d681SAndroid Build Coastguard Worker; fold the immediate by breaking it into two parts and fold them into the
6*9880d681SAndroid Build Coastguard Worker; immmediate fields of two uses. e.g
7*9880d681SAndroid Build Coastguard Worker;        movw    r2, #40885
8*9880d681SAndroid Build Coastguard Worker;        movt    r3, #46540
9*9880d681SAndroid Build Coastguard Worker;        add     r0, r0, r3
10*9880d681SAndroid Build Coastguard Worker; =>
11*9880d681SAndroid Build Coastguard Worker;        add.w   r0, r0, #3019898880
12*9880d681SAndroid Build Coastguard Worker;        add.w   r0, r0, #30146560
13*9880d681SAndroid Build Coastguard Worker;
14*9880d681SAndroid Build Coastguard Worker; However, this transformation is incorrect if the user produces a flag. e.g.
15*9880d681SAndroid Build Coastguard Worker;        movw    r2, #40885
16*9880d681SAndroid Build Coastguard Worker;        movt    r3, #46540
17*9880d681SAndroid Build Coastguard Worker;        adds    r0, r0, r3
18*9880d681SAndroid Build Coastguard Worker; =>
19*9880d681SAndroid Build Coastguard Worker;        add.w   r0, r0, #3019898880
20*9880d681SAndroid Build Coastguard Worker;        adds.w  r0, r0, #30146560
21*9880d681SAndroid Build Coastguard Worker; Note the adds.w may not set the carry flag even if the original sequence
22*9880d681SAndroid Build Coastguard Worker; would.
23*9880d681SAndroid Build Coastguard Worker;
24*9880d681SAndroid Build Coastguard Worker; rdar://11116189
25*9880d681SAndroid Build Coastguard Workerdefine i64 @t(i64 %aInput) nounwind {
26*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: t:
27*9880d681SAndroid Build Coastguard Worker; CHECK: movs [[REG:(r[0-9]+)]], #0
28*9880d681SAndroid Build Coastguard Worker; CHECK: movt [[REG]], #46540
29*9880d681SAndroid Build Coastguard Worker; CHECK: adds r{{[0-9]+}}, r{{[0-9]+}}, [[REG]]
30*9880d681SAndroid Build Coastguard Worker  %1 = mul i64 %aInput, 1000000
31*9880d681SAndroid Build Coastguard Worker  %2 = add i64 %1, -7952618389194932224
32*9880d681SAndroid Build Coastguard Worker  ret i64 %2
33*9880d681SAndroid Build Coastguard Worker}
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