xref: /aosp_15_r20/external/llvm/test/CodeGen/ARM/2011-08-12-vmovqqqq-pseudo.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc %s -mtriple=thumbv7-apple-darwin -verify-machineinstrs -mcpu=cortex-a9 -O0 -o -
2*9880d681SAndroid Build Coastguard Worker; Make sure that the VMOVQQQQ pseudo instruction is handled properly
3*9880d681SAndroid Build Coastguard Worker; by codegen.
4*9880d681SAndroid Build Coastguard Worker
5*9880d681SAndroid Build Coastguard Workerdefine void @test_vmovqqqq_pseudo() nounwind ssp {
6*9880d681SAndroid Build Coastguard Workerentry:
7*9880d681SAndroid Build Coastguard Worker  %vld3_lane = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.arm.neon.vld3lane.v8i16.p0i8(i8* undef, <8 x i16> undef, <8 x i16> undef, <8 x i16> zeroinitializer, i32 7, i32 2)
8*9880d681SAndroid Build Coastguard Worker  store { <8 x i16>, <8 x i16>, <8 x i16> } %vld3_lane, { <8 x i16>, <8 x i16>, <8 x i16> }* undef
9*9880d681SAndroid Build Coastguard Worker  ret void
10*9880d681SAndroid Build Coastguard Worker}
11*9880d681SAndroid Build Coastguard Worker
12*9880d681SAndroid Build Coastguard Workerdeclare { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.arm.neon.vld3lane.v8i16.p0i8(i8*, <8 x i16>, <8 x i16>, <8 x i16>, i32, i32) nounwind readonly
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