1*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -O0 -verify-machineinstrs -regalloc=fast 2*9880d681SAndroid Build Coastguard Worker; Previously we'd crash as out of registers on this input by clobbering all of 3*9880d681SAndroid Build Coastguard Worker; the aliases. 4*9880d681SAndroid Build Coastguard Workertarget datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32" 5*9880d681SAndroid Build Coastguard Workertarget triple = "thumbv7-apple-darwin10.0.0" 6*9880d681SAndroid Build Coastguard Worker 7*9880d681SAndroid Build Coastguard Workerdefine void @_Z8TestCasev() nounwind ssp { 8*9880d681SAndroid Build Coastguard Workerentry: 9*9880d681SAndroid Build Coastguard Worker %a = alloca float, align 4 10*9880d681SAndroid Build Coastguard Worker %tmp = load float, float* %a, align 4 11*9880d681SAndroid Build Coastguard Worker call void asm sideeffect "", "w,~{s0},~{s16}"(float %tmp) nounwind, !srcloc !0 12*9880d681SAndroid Build Coastguard Worker ret void 13*9880d681SAndroid Build Coastguard Worker} 14*9880d681SAndroid Build Coastguard Worker 15*9880d681SAndroid Build Coastguard Worker!0 = !{i32 109} 16