1*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -mtriple=armv6-apple-darwin -mcpu=arm1136jf-s -arm-atomic-cfg-tidy=0 | FileCheck %s 2*9880d681SAndroid Build Coastguard Worker; Radar 8589805: Counting the number of microcoded operations, such as for an 3*9880d681SAndroid Build Coastguard Worker; LDM instruction, was causing an assertion failure because the microop count 4*9880d681SAndroid Build Coastguard Worker; was being treated as an instruction count. 5*9880d681SAndroid Build Coastguard Worker 6*9880d681SAndroid Build Coastguard Worker; CHECK: push 7*9880d681SAndroid Build Coastguard Worker; CHECK: pop 8*9880d681SAndroid Build Coastguard Worker; CHECK: pop 9*9880d681SAndroid Build Coastguard Worker; CHECK: pop 10*9880d681SAndroid Build Coastguard Worker 11*9880d681SAndroid Build Coastguard Workerdefine i32 @test(i32 %x) { 12*9880d681SAndroid Build Coastguard Workerentry: 13*9880d681SAndroid Build Coastguard Worker %0 = tail call signext i16 undef(i32* undef) 14*9880d681SAndroid Build Coastguard Worker switch i32 %x, label %bb3 [ 15*9880d681SAndroid Build Coastguard Worker i32 0, label %bb4 16*9880d681SAndroid Build Coastguard Worker i32 1, label %bb1 17*9880d681SAndroid Build Coastguard Worker i32 2, label %bb2 18*9880d681SAndroid Build Coastguard Worker ] 19*9880d681SAndroid Build Coastguard Worker 20*9880d681SAndroid Build Coastguard Workerbb1: 21*9880d681SAndroid Build Coastguard Worker ret i32 1 22*9880d681SAndroid Build Coastguard Worker 23*9880d681SAndroid Build Coastguard Workerbb2: 24*9880d681SAndroid Build Coastguard Worker ret i32 2 25*9880d681SAndroid Build Coastguard Worker 26*9880d681SAndroid Build Coastguard Workerbb3: 27*9880d681SAndroid Build Coastguard Worker ret i32 1 28*9880d681SAndroid Build Coastguard Worker 29*9880d681SAndroid Build Coastguard Workerbb4: 30*9880d681SAndroid Build Coastguard Worker ret i32 3 31*9880d681SAndroid Build Coastguard Worker} 32