1*9880d681SAndroid Build Coastguard Worker; XFAIL: * 2*9880d681SAndroid Build Coastguard Worker; REQUIRES: asserts 3*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s 4*9880d681SAndroid Build Coastguard Worker 5*9880d681SAndroid Build Coastguard Worker; write_register doesn't prevent us from illegally trying to write a 6*9880d681SAndroid Build Coastguard Worker; vgpr value into a scalar register, but I don't think there's much we 7*9880d681SAndroid Build Coastguard Worker; can do to avoid this. 8*9880d681SAndroid Build Coastguard Worker 9*9880d681SAndroid Build Coastguard Workerdeclare void @llvm.write_register.i32(metadata, i32) #0 10*9880d681SAndroid Build Coastguard Workerdeclare i32 @llvm.amdgcn.workitem.id.x() #0 11*9880d681SAndroid Build Coastguard Worker 12*9880d681SAndroid Build Coastguard Worker 13*9880d681SAndroid Build Coastguard Workerdefine void @write_vgpr_into_sgpr() { 14*9880d681SAndroid Build Coastguard Worker %tid = call i32 @llvm.amdgcn.workitem.id.x() 15*9880d681SAndroid Build Coastguard Worker call void @llvm.write_register.i32(metadata !0, i32 %tid) 16*9880d681SAndroid Build Coastguard Worker ret void 17*9880d681SAndroid Build Coastguard Worker} 18*9880d681SAndroid Build Coastguard Worker 19*9880d681SAndroid Build Coastguard Workerattributes #0 = { nounwind readnone } 20*9880d681SAndroid Build Coastguard Workerattributes #1 = { nounwind } 21*9880d681SAndroid Build Coastguard Worker 22*9880d681SAndroid Build Coastguard Worker!0 = !{!"exec_lo"} 23