1*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri | FileCheck --check-prefix=GCN %s 2*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=fiji | FileCheck --check-prefix=GCN %s 3*9880d681SAndroid Build Coastguard Worker 4*9880d681SAndroid Build Coastguard Worker; If flat_store_dword and flat_load_dword use different registers for the data 5*9880d681SAndroid Build Coastguard Worker; operand, this test is not broken. It just means it is no longer testing 6*9880d681SAndroid Build Coastguard Worker; for the original bug. 7*9880d681SAndroid Build Coastguard Worker 8*9880d681SAndroid Build Coastguard Worker; GCN: {{^}}test: 9*9880d681SAndroid Build Coastguard Worker; XGCN: flat_store_dword v[{{[0-9]+:[0-9]+}}], [[DATA:v[0-9]+]] 10*9880d681SAndroid Build Coastguard Worker; XGCN: s_waitcnt vmcnt(0) lgkmcnt(0) 11*9880d681SAndroid Build Coastguard Worker; XGCN: flat_load_dword [[DATA]], v[{{[0-9]+:[0-9]+}}] 12*9880d681SAndroid Build Coastguard Workerdefine void @test(i32 addrspace(1)* %out, i32 %in) { 13*9880d681SAndroid Build Coastguard Worker store volatile i32 0, i32 addrspace(1)* %out 14*9880d681SAndroid Build Coastguard Worker %val = load volatile i32, i32 addrspace(1)* %out 15*9880d681SAndroid Build Coastguard Worker ret void 16*9880d681SAndroid Build Coastguard Worker} 17