1*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck %s 2*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s 3*9880d681SAndroid Build Coastguard Worker 4*9880d681SAndroid Build Coastguard Worker; This used to raise an assertion due to how the choice between uniform and 5*9880d681SAndroid Build Coastguard Worker; non-uniform branches was determined. 6*9880d681SAndroid Build Coastguard Worker; 7*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: {{^}}main: 8*9880d681SAndroid Build Coastguard Worker; CHECK: s_cbranch_vccnz 9*9880d681SAndroid Build Coastguard Workerdefine amdgpu_ps float @main(<4 x i32> inreg %rsrc) { 10*9880d681SAndroid Build Coastguard Workermain_body: 11*9880d681SAndroid Build Coastguard Worker %v = call float @llvm.amdgcn.buffer.load.f32(<4 x i32> %rsrc, i32 0, i32 0, i1 true, i1 false) 12*9880d681SAndroid Build Coastguard Worker %cc = fcmp une float %v, 1.000000e+00 13*9880d681SAndroid Build Coastguard Worker br i1 %cc, label %if, label %else 14*9880d681SAndroid Build Coastguard Worker 15*9880d681SAndroid Build Coastguard Workerif: 16*9880d681SAndroid Build Coastguard Worker %u = fadd float %v, %v 17*9880d681SAndroid Build Coastguard Worker br label %else 18*9880d681SAndroid Build Coastguard Worker 19*9880d681SAndroid Build Coastguard Workerelse: 20*9880d681SAndroid Build Coastguard Worker %r = phi float [ %v, %main_body ], [ %u, %if ] 21*9880d681SAndroid Build Coastguard Worker ret float %r 22*9880d681SAndroid Build Coastguard Worker} 23*9880d681SAndroid Build Coastguard Worker 24*9880d681SAndroid Build Coastguard Worker; Function Attrs: nounwind readonly 25*9880d681SAndroid Build Coastguard Workerdeclare float @llvm.amdgcn.buffer.load.f32(<4 x i32>, i32, i32, i1, i1) #0 26*9880d681SAndroid Build Coastguard Worker 27*9880d681SAndroid Build Coastguard Workerattributes #0 = { nounwind readonly } 28