1*9880d681SAndroid Build Coastguard Worker;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s 2*9880d681SAndroid Build Coastguard Worker 3*9880d681SAndroid Build Coastguard Worker;CHECK: TEX 4*9880d681SAndroid Build Coastguard Worker;CHECK-NEXT: ALU 5*9880d681SAndroid Build Coastguard Worker 6*9880d681SAndroid Build Coastguard Workerdefine amdgpu_vs void @test(<4 x float> inreg %reg0) { 7*9880d681SAndroid Build Coastguard Worker %1 = extractelement <4 x float> %reg0, i32 0 8*9880d681SAndroid Build Coastguard Worker %2 = extractelement <4 x float> %reg0, i32 1 9*9880d681SAndroid Build Coastguard Worker %3 = extractelement <4 x float> %reg0, i32 2 10*9880d681SAndroid Build Coastguard Worker %4 = extractelement <4 x float> %reg0, i32 3 11*9880d681SAndroid Build Coastguard Worker %5 = insertelement <4 x float> undef, float %1, i32 0 12*9880d681SAndroid Build Coastguard Worker %6 = insertelement <4 x float> %5, float %2, i32 1 13*9880d681SAndroid Build Coastguard Worker %7 = insertelement <4 x float> %6, float %3, i32 2 14*9880d681SAndroid Build Coastguard Worker %8 = insertelement <4 x float> %7, float %4, i32 3 15*9880d681SAndroid Build Coastguard Worker %9 = call <4 x float> @llvm.r600.tex(<4 x float> %8, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0) 16*9880d681SAndroid Build Coastguard Worker %10 = call <4 x float> @llvm.r600.tex(<4 x float> %8, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0) 17*9880d681SAndroid Build Coastguard Worker %11 = fadd <4 x float> %9, %10 18*9880d681SAndroid Build Coastguard Worker call void @llvm.R600.store.swizzle(<4 x float> %11, i32 0, i32 0) 19*9880d681SAndroid Build Coastguard Worker ret void 20*9880d681SAndroid Build Coastguard Worker} 21*9880d681SAndroid Build Coastguard Worker 22*9880d681SAndroid Build Coastguard Workerdeclare <4 x float> @llvm.r600.tex(<4 x float>, i32, i32, i32, i32, i32, i32, i32, i32, i32) readnone 23*9880d681SAndroid Build Coastguard Workerdeclare void @llvm.R600.store.swizzle(<4 x float>, i32, i32) 24