1*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=amdgcn -mcpu=verde -enable-misched=0 -post-RA-scheduler=0 < %s | FileCheck %s 2*9880d681SAndroid Build Coastguard Worker; RUN: llc -regalloc=basic -march=amdgcn -mcpu=tonga -enable-misched=0 -post-RA-scheduler=0 < %s | FileCheck %s 3*9880d681SAndroid Build Coastguard Worker ; 4*9880d681SAndroid Build Coastguard Worker; There is something about Tonga that causes this test to spend a lot of time 5*9880d681SAndroid Build Coastguard Worker; in the default register allocator. 6*9880d681SAndroid Build Coastguard Worker 7*9880d681SAndroid Build Coastguard Worker 8*9880d681SAndroid Build Coastguard Worker; When the offset of VGPR spills into scratch space gets too large, an additional SGPR 9*9880d681SAndroid Build Coastguard Worker; is used to calculate the scratch load/store address. Make sure that this 10*9880d681SAndroid Build Coastguard Worker; mechanism works even when many spills happen. 11*9880d681SAndroid Build Coastguard Worker 12*9880d681SAndroid Build Coastguard Worker; Just test that it compiles successfully. 13*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: test 14*9880d681SAndroid Build Coastguard Workerdefine void @test(<1280 x i32> addrspace(1)* %out, <1280 x i32> addrspace(1)* %in) { 15*9880d681SAndroid Build Coastguard Workerentry: 16*9880d681SAndroid Build Coastguard Worker %lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0) 17*9880d681SAndroid Build Coastguard Worker %tid = call i32 @llvm.amdgcn.mbcnt.hi(i32 -1, i32 %lo) 18*9880d681SAndroid Build Coastguard Worker 19*9880d681SAndroid Build Coastguard Worker %aptr = getelementptr <1280 x i32>, <1280 x i32> addrspace(1)* %in, i32 %tid 20*9880d681SAndroid Build Coastguard Worker %a = load <1280 x i32>, <1280 x i32> addrspace(1)* %aptr 21*9880d681SAndroid Build Coastguard Worker 22*9880d681SAndroid Build Coastguard Worker; mark most VGPR registers as used to increase register pressure 23*9880d681SAndroid Build Coastguard Worker call void asm sideeffect "", "~{VGPR4},~{VGPR8},~{VGPR12},~{VGPR16},~{VGPR20},~{VGPR24},~{VGPR28},~{VGPR32}" () 24*9880d681SAndroid Build Coastguard Worker call void asm sideeffect "", "~{VGPR36},~{VGPR40},~{VGPR44},~{VGPR48},~{VGPR52},~{VGPR56},~{VGPR60},~{VGPR64}" () 25*9880d681SAndroid Build Coastguard Worker call void asm sideeffect "", "~{VGPR68},~{VGPR72},~{VGPR76},~{VGPR80},~{VGPR84},~{VGPR88},~{VGPR92},~{VGPR96}" () 26*9880d681SAndroid Build Coastguard Worker call void asm sideeffect "", "~{VGPR100},~{VGPR104},~{VGPR108},~{VGPR112},~{VGPR116},~{VGPR120},~{VGPR124},~{VGPR128}" () 27*9880d681SAndroid Build Coastguard Worker call void asm sideeffect "", "~{VGPR132},~{VGPR136},~{VGPR140},~{VGPR144},~{VGPR148},~{VGPR152},~{VGPR156},~{VGPR160}" () 28*9880d681SAndroid Build Coastguard Worker call void asm sideeffect "", "~{VGPR164},~{VGPR168},~{VGPR172},~{VGPR176},~{VGPR180},~{VGPR184},~{VGPR188},~{VGPR192}" () 29*9880d681SAndroid Build Coastguard Worker call void asm sideeffect "", "~{VGPR196},~{VGPR200},~{VGPR204},~{VGPR208},~{VGPR212},~{VGPR216},~{VGPR220},~{VGPR224}" () 30*9880d681SAndroid Build Coastguard Worker 31*9880d681SAndroid Build Coastguard Worker %outptr = getelementptr <1280 x i32>, <1280 x i32> addrspace(1)* %out, i32 %tid 32*9880d681SAndroid Build Coastguard Worker store <1280 x i32> %a, <1280 x i32> addrspace(1)* %outptr 33*9880d681SAndroid Build Coastguard Worker 34*9880d681SAndroid Build Coastguard Worker ret void 35*9880d681SAndroid Build Coastguard Worker} 36*9880d681SAndroid Build Coastguard Worker 37*9880d681SAndroid Build Coastguard Workerdeclare i32 @llvm.amdgcn.mbcnt.lo(i32, i32) #1 38*9880d681SAndroid Build Coastguard Workerdeclare i32 @llvm.amdgcn.mbcnt.hi(i32, i32) #1 39*9880d681SAndroid Build Coastguard Worker 40*9880d681SAndroid Build Coastguard Workerattributes #1 = { nounwind readnone } 41