1*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -march=amdgcn -verify-machineinstrs | FileCheck %s --check-prefix=SI --check-prefix=FUNC 2*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s --check-prefix=SI --check-prefix=FUNC 3*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG --check-prefix=FUNC 4*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=CM --check-prefix=FUNC 5*9880d681SAndroid Build Coastguard Worker 6*9880d681SAndroid Build Coastguard Worker; FUNC-LABEL: {{^}}i32_mul24: 7*9880d681SAndroid Build Coastguard Worker; Signed 24-bit multiply is not supported on pre-Cayman GPUs. 8*9880d681SAndroid Build Coastguard Worker; EG: MULLO_INT 9*9880d681SAndroid Build Coastguard Worker; Make sure we are not masking the inputs 10*9880d681SAndroid Build Coastguard Worker; CM-NOT: AND 11*9880d681SAndroid Build Coastguard Worker; CM: MUL_INT24 12*9880d681SAndroid Build Coastguard Worker; SI-NOT: and 13*9880d681SAndroid Build Coastguard Worker; SI: v_mul_i32_i24 14*9880d681SAndroid Build Coastguard Workerdefine void @i32_mul24(i32 addrspace(1)* %out, i32 %a, i32 %b) { 15*9880d681SAndroid Build Coastguard Workerentry: 16*9880d681SAndroid Build Coastguard Worker %0 = shl i32 %a, 8 17*9880d681SAndroid Build Coastguard Worker %a_24 = ashr i32 %0, 8 18*9880d681SAndroid Build Coastguard Worker %1 = shl i32 %b, 8 19*9880d681SAndroid Build Coastguard Worker %b_24 = ashr i32 %1, 8 20*9880d681SAndroid Build Coastguard Worker %2 = mul i32 %a_24, %b_24 21*9880d681SAndroid Build Coastguard Worker store i32 %2, i32 addrspace(1)* %out 22*9880d681SAndroid Build Coastguard Worker ret void 23*9880d681SAndroid Build Coastguard Worker} 24