xref: /aosp_15_r20/external/llvm/test/CodeGen/AMDGPU/lshr.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
2*9880d681SAndroid Build Coastguard Worker;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
3*9880d681SAndroid Build Coastguard Worker
4*9880d681SAndroid Build Coastguard Worker;CHECK: s_lshr_b32 s{{[0-9]}}, s{{[0-9]}}, 1
5*9880d681SAndroid Build Coastguard Worker
6*9880d681SAndroid Build Coastguard Workerdefine void @test(i32 %p) {
7*9880d681SAndroid Build Coastguard Worker   %i = udiv i32 %p, 2
8*9880d681SAndroid Build Coastguard Worker   %r = bitcast i32 %i to float
9*9880d681SAndroid Build Coastguard Worker   call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %r, float %r, float %r, float %r)
10*9880d681SAndroid Build Coastguard Worker   ret void
11*9880d681SAndroid Build Coastguard Worker}
12*9880d681SAndroid Build Coastguard Worker
13*9880d681SAndroid Build Coastguard Workerdeclare <4 x float> @llvm.SI.sample.(i32, <4 x i32>, <8 x i32>, <4 x i32>, i32) readnone
14*9880d681SAndroid Build Coastguard Worker
15*9880d681SAndroid Build Coastguard Workerdeclare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
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