1*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG %s 2*9880d681SAndroid Build Coastguard Worker 3*9880d681SAndroid Build Coastguard Worker; EG-LABEL: {{^}}read_workdim: 4*9880d681SAndroid Build Coastguard Worker; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 5*9880d681SAndroid Build Coastguard Worker; EG: MOV * [[VAL]], KC0[2].Z 6*9880d681SAndroid Build Coastguard Workerdefine void @read_workdim(i32 addrspace(1)* %out) { 7*9880d681SAndroid Build Coastguard Workerentry: 8*9880d681SAndroid Build Coastguard Worker %dim = call i32 @llvm.r600.read.workdim() #0 9*9880d681SAndroid Build Coastguard Worker store i32 %dim, i32 addrspace(1)* %out 10*9880d681SAndroid Build Coastguard Worker ret void 11*9880d681SAndroid Build Coastguard Worker} 12*9880d681SAndroid Build Coastguard Worker 13*9880d681SAndroid Build Coastguard Worker; EG-LABEL: {{^}}read_workdim_known_bits: 14*9880d681SAndroid Build Coastguard Workerdefine void @read_workdim_known_bits(i32 addrspace(1)* %out) { 15*9880d681SAndroid Build Coastguard Workerentry: 16*9880d681SAndroid Build Coastguard Worker %dim = call i32 @llvm.r600.read.workdim() #0 17*9880d681SAndroid Build Coastguard Worker %shl = shl i32 %dim, 24 18*9880d681SAndroid Build Coastguard Worker %shr = lshr i32 %shl, 24 19*9880d681SAndroid Build Coastguard Worker store i32 %shr, i32 addrspace(1)* %out 20*9880d681SAndroid Build Coastguard Worker ret void 21*9880d681SAndroid Build Coastguard Worker} 22*9880d681SAndroid Build Coastguard Worker 23*9880d681SAndroid Build Coastguard Worker; EG-LABEL: {{^}}legacy_read_workdim: 24*9880d681SAndroid Build Coastguard Worker; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 25*9880d681SAndroid Build Coastguard Worker; EG: MOV * [[VAL]], KC0[2].Z 26*9880d681SAndroid Build Coastguard Workerdefine void @legacy_read_workdim(i32 addrspace(1)* %out) { 27*9880d681SAndroid Build Coastguard Workerentry: 28*9880d681SAndroid Build Coastguard Worker %dim = call i32 @llvm.AMDGPU.read.workdim() #0 29*9880d681SAndroid Build Coastguard Worker store i32 %dim, i32 addrspace(1)* %out 30*9880d681SAndroid Build Coastguard Worker ret void 31*9880d681SAndroid Build Coastguard Worker} 32*9880d681SAndroid Build Coastguard Worker 33*9880d681SAndroid Build Coastguard Workerdeclare i32 @llvm.r600.read.workdim() #0 34*9880d681SAndroid Build Coastguard Workerdeclare i32 @llvm.AMDGPU.read.workdim() #0 35*9880d681SAndroid Build Coastguard Worker 36*9880d681SAndroid Build Coastguard Workerattributes #0 = { nounwind readnone } 37