xref: /aosp_15_r20/external/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ps.live.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK %s
2*9880d681SAndroid Build Coastguard Worker
3*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: {{^}}test1:
4*9880d681SAndroid Build Coastguard Worker; CHECK: v_cndmask_b32_e64 v0, 0, 1, exec
5*9880d681SAndroid Build Coastguard Worker;
6*9880d681SAndroid Build Coastguard Worker; Note: We could generate better code here if we recognized earlier that
7*9880d681SAndroid Build Coastguard Worker; there is no WQM use and therefore llvm.amdgcn.ps.live is constant. However,
8*9880d681SAndroid Build Coastguard Worker; the expectation is that the intrinsic will be used in non-trivial shaders,
9*9880d681SAndroid Build Coastguard Worker; so such an optimization doesn't seem worth the effort.
10*9880d681SAndroid Build Coastguard Workerdefine amdgpu_ps float @test1() {
11*9880d681SAndroid Build Coastguard Worker  %live = call i1 @llvm.amdgcn.ps.live()
12*9880d681SAndroid Build Coastguard Worker  %live.32 = zext i1 %live to i32
13*9880d681SAndroid Build Coastguard Worker  %r = bitcast i32 %live.32 to float
14*9880d681SAndroid Build Coastguard Worker  ret float %r
15*9880d681SAndroid Build Coastguard Worker}
16*9880d681SAndroid Build Coastguard Worker
17*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: {{^}}test2:
18*9880d681SAndroid Build Coastguard Worker; CHECK: s_mov_b64 [[LIVE:s\[[0-9]+:[0-9]+\]]], exec
19*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: s_wqm_b64 exec, exec
20*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: v_cndmask_b32_e64 [[VAR:v[0-9]+]], 0, 1, [[LIVE]]
21*9880d681SAndroid Build Coastguard Worker; CHECK: image_sample v0, [[VAR]],
22*9880d681SAndroid Build Coastguard Workerdefine amdgpu_ps float @test2() {
23*9880d681SAndroid Build Coastguard Worker  %live = call i1 @llvm.amdgcn.ps.live()
24*9880d681SAndroid Build Coastguard Worker  %live.32 = zext i1 %live to i32
25*9880d681SAndroid Build Coastguard Worker
26*9880d681SAndroid Build Coastguard Worker  %t = call <4 x float> @llvm.SI.image.sample.i32(i32 %live.32, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
27*9880d681SAndroid Build Coastguard Worker
28*9880d681SAndroid Build Coastguard Worker  %r = extractelement <4 x float> %t, i32 0
29*9880d681SAndroid Build Coastguard Worker  ret float %r
30*9880d681SAndroid Build Coastguard Worker}
31*9880d681SAndroid Build Coastguard Worker
32*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: {{^}}test3:
33*9880d681SAndroid Build Coastguard Worker; CHECK: s_mov_b64 [[LIVE:s\[[0-9]+:[0-9]+\]]], exec
34*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: s_wqm_b64 exec, exec
35*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: s_xor_b64 [[HELPER:s\[[0-9]+:[0-9]+\]]], [[LIVE]], -1
36*9880d681SAndroid Build Coastguard Worker; CHECK_DAG: s_and_saveexec_b64 [[SAVED:s\[[0-9]+:[0-9]+\]]], [[HELPER]]
37*9880d681SAndroid Build Coastguard Worker; CHECK: ; %dead
38*9880d681SAndroid Build Coastguard Workerdefine amdgpu_ps float @test3(i32 %in) {
39*9880d681SAndroid Build Coastguard Workerentry:
40*9880d681SAndroid Build Coastguard Worker  %live = call i1 @llvm.amdgcn.ps.live()
41*9880d681SAndroid Build Coastguard Worker  br i1 %live, label %end, label %dead
42*9880d681SAndroid Build Coastguard Worker
43*9880d681SAndroid Build Coastguard Workerdead:
44*9880d681SAndroid Build Coastguard Worker  %tc.dead = mul i32 %in, 2
45*9880d681SAndroid Build Coastguard Worker  br label %end
46*9880d681SAndroid Build Coastguard Worker
47*9880d681SAndroid Build Coastguard Workerend:
48*9880d681SAndroid Build Coastguard Worker  %tc = phi i32 [ %in, %entry ], [ %tc.dead, %dead ]
49*9880d681SAndroid Build Coastguard Worker  %t = call <4 x float> @llvm.SI.image.sample.i32(i32 %tc, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
50*9880d681SAndroid Build Coastguard Worker
51*9880d681SAndroid Build Coastguard Worker  %r = extractelement <4 x float> %t, i32 0
52*9880d681SAndroid Build Coastguard Worker  ret float %r
53*9880d681SAndroid Build Coastguard Worker}
54*9880d681SAndroid Build Coastguard Worker
55*9880d681SAndroid Build Coastguard Workerdeclare i1 @llvm.amdgcn.ps.live() #0
56*9880d681SAndroid Build Coastguard Worker
57*9880d681SAndroid Build Coastguard Workerdeclare <4 x float> @llvm.SI.image.sample.i32(i32, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #0
58*9880d681SAndroid Build Coastguard Worker
59*9880d681SAndroid Build Coastguard Workerattributes #0 = { nounwind readnone }
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