1*9880d681SAndroid Build Coastguard Worker;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG 2*9880d681SAndroid Build Coastguard Worker;RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=CM 3*9880d681SAndroid Build Coastguard Worker 4*9880d681SAndroid Build Coastguard Worker;EG-LABEL: {{^}}test: 5*9880d681SAndroid Build Coastguard Worker;EG: EXP_IEEE * 6*9880d681SAndroid Build Coastguard Worker;CM-LABEL: {{^}}test: 7*9880d681SAndroid Build Coastguard Worker;CM: EXP_IEEE T{{[0-9]+}}.X, -|T{{[0-9]+}}.X| 8*9880d681SAndroid Build Coastguard Worker;CM: EXP_IEEE T{{[0-9]+}}.Y (MASKED), -|T{{[0-9]+}}.X| 9*9880d681SAndroid Build Coastguard Worker;CM: EXP_IEEE T{{[0-9]+}}.Z (MASKED), -|T{{[0-9]+}}.X| 10*9880d681SAndroid Build Coastguard Worker;CM: EXP_IEEE * T{{[0-9]+}}.W (MASKED), -|T{{[0-9]+}}.X| 11*9880d681SAndroid Build Coastguard Worker 12*9880d681SAndroid Build Coastguard Workerdefine amdgpu_ps void @test(<4 x float> inreg %reg0) { 13*9880d681SAndroid Build Coastguard Worker %r0 = extractelement <4 x float> %reg0, i32 0 14*9880d681SAndroid Build Coastguard Worker %r1 = call float @llvm.fabs.f32(float %r0) 15*9880d681SAndroid Build Coastguard Worker %r2 = fsub float -0.000000e+00, %r1 16*9880d681SAndroid Build Coastguard Worker %r3 = call float @llvm.exp2.f32(float %r2) 17*9880d681SAndroid Build Coastguard Worker %vec = insertelement <4 x float> undef, float %r3, i32 0 18*9880d681SAndroid Build Coastguard Worker call void @llvm.R600.store.swizzle(<4 x float> %vec, i32 0, i32 0) 19*9880d681SAndroid Build Coastguard Worker ret void 20*9880d681SAndroid Build Coastguard Worker} 21*9880d681SAndroid Build Coastguard Worker 22*9880d681SAndroid Build Coastguard Workerdeclare float @llvm.exp2.f32(float) readnone 23*9880d681SAndroid Build Coastguard Workerdeclare float @llvm.fabs.f32(float) readnone 24*9880d681SAndroid Build Coastguard Workerdeclare void @llvm.R600.store.swizzle(<4 x float>, i32, i32) 25