1*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s 2*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s 3*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s 4*9880d681SAndroid Build Coastguard Worker 5*9880d681SAndroid Build Coastguard Workerdeclare float @llvm.minnum.f32(float, float) nounwind readnone 6*9880d681SAndroid Build Coastguard Worker 7*9880d681SAndroid Build Coastguard Worker; SI-LABEL: {{^}}test_fmin3_olt_0: 8*9880d681SAndroid Build Coastguard Worker; SI: buffer_load_dword [[REGC:v[0-9]+]] 9*9880d681SAndroid Build Coastguard Worker; SI: buffer_load_dword [[REGB:v[0-9]+]] 10*9880d681SAndroid Build Coastguard Worker; SI: buffer_load_dword [[REGA:v[0-9]+]] 11*9880d681SAndroid Build Coastguard Worker; SI: v_min3_f32 [[RESULT:v[0-9]+]], [[REGC]], [[REGB]], [[REGA]] 12*9880d681SAndroid Build Coastguard Worker; SI: buffer_store_dword [[RESULT]], 13*9880d681SAndroid Build Coastguard Worker; SI: s_endpgm 14*9880d681SAndroid Build Coastguard Workerdefine void @test_fmin3_olt_0(float addrspace(1)* %out, float addrspace(1)* %aptr, float addrspace(1)* %bptr, float addrspace(1)* %cptr) nounwind { 15*9880d681SAndroid Build Coastguard Worker %a = load volatile float, float addrspace(1)* %aptr, align 4 16*9880d681SAndroid Build Coastguard Worker %b = load volatile float, float addrspace(1)* %bptr, align 4 17*9880d681SAndroid Build Coastguard Worker %c = load volatile float, float addrspace(1)* %cptr, align 4 18*9880d681SAndroid Build Coastguard Worker %f0 = call float @llvm.minnum.f32(float %a, float %b) nounwind readnone 19*9880d681SAndroid Build Coastguard Worker %f1 = call float @llvm.minnum.f32(float %f0, float %c) nounwind readnone 20*9880d681SAndroid Build Coastguard Worker store float %f1, float addrspace(1)* %out, align 4 21*9880d681SAndroid Build Coastguard Worker ret void 22*9880d681SAndroid Build Coastguard Worker} 23*9880d681SAndroid Build Coastguard Worker 24*9880d681SAndroid Build Coastguard Worker; Commute operand of second fmin 25*9880d681SAndroid Build Coastguard Worker; SI-LABEL: {{^}}test_fmin3_olt_1: 26*9880d681SAndroid Build Coastguard Worker; SI: buffer_load_dword [[REGB:v[0-9]+]] 27*9880d681SAndroid Build Coastguard Worker; SI: buffer_load_dword [[REGA:v[0-9]+]] 28*9880d681SAndroid Build Coastguard Worker; SI: buffer_load_dword [[REGC:v[0-9]+]] 29*9880d681SAndroid Build Coastguard Worker; SI: v_min3_f32 [[RESULT:v[0-9]+]], [[REGC]], [[REGB]], [[REGA]] 30*9880d681SAndroid Build Coastguard Worker; SI: buffer_store_dword [[RESULT]], 31*9880d681SAndroid Build Coastguard Worker; SI: s_endpgm 32*9880d681SAndroid Build Coastguard Workerdefine void @test_fmin3_olt_1(float addrspace(1)* %out, float addrspace(1)* %aptr, float addrspace(1)* %bptr, float addrspace(1)* %cptr) nounwind { 33*9880d681SAndroid Build Coastguard Worker %a = load volatile float, float addrspace(1)* %aptr, align 4 34*9880d681SAndroid Build Coastguard Worker %b = load volatile float, float addrspace(1)* %bptr, align 4 35*9880d681SAndroid Build Coastguard Worker %c = load volatile float, float addrspace(1)* %cptr, align 4 36*9880d681SAndroid Build Coastguard Worker %f0 = call float @llvm.minnum.f32(float %a, float %b) nounwind readnone 37*9880d681SAndroid Build Coastguard Worker %f1 = call float @llvm.minnum.f32(float %c, float %f0) nounwind readnone 38*9880d681SAndroid Build Coastguard Worker store float %f1, float addrspace(1)* %out, align 4 39*9880d681SAndroid Build Coastguard Worker ret void 40*9880d681SAndroid Build Coastguard Worker} 41