xref: /aosp_15_r20/external/llvm/test/CodeGen/AMDGPU/fmax3.f64.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
2*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
3*9880d681SAndroid Build Coastguard Worker
4*9880d681SAndroid Build Coastguard Workerdeclare double @llvm.maxnum.f64(double, double) nounwind readnone
5*9880d681SAndroid Build Coastguard Worker
6*9880d681SAndroid Build Coastguard Worker; SI-LABEL: {{^}}test_fmax3_f64:
7*9880d681SAndroid Build Coastguard Worker; SI-DAG: buffer_load_dwordx2 [[REGA:v\[[0-9]+:[0-9]+\]]], off, s[{{[0-9]+:[0-9]+}}], 0{{$}}
8*9880d681SAndroid Build Coastguard Worker; SI-DAG: buffer_load_dwordx2 [[REGB:v\[[0-9]+:[0-9]+\]]], off, s[{{[0-9]+:[0-9]+}}], 0 offset:8
9*9880d681SAndroid Build Coastguard Worker; SI-DAG: buffer_load_dwordx2 [[REGC:v\[[0-9]+:[0-9]+\]]], off, s[{{[0-9]+:[0-9]+}}], 0 offset:16
10*9880d681SAndroid Build Coastguard Worker; SI: v_max_f64 [[REGA]], [[REGA]], [[REGB]]
11*9880d681SAndroid Build Coastguard Worker; SI: v_max_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[REGA]], [[REGC]]
12*9880d681SAndroid Build Coastguard Worker; SI: buffer_store_dwordx2 [[RESULT]],
13*9880d681SAndroid Build Coastguard Worker; SI: s_endpgm
14*9880d681SAndroid Build Coastguard Workerdefine void @test_fmax3_f64(double addrspace(1)* %out, double addrspace(1)* %aptr) nounwind {
15*9880d681SAndroid Build Coastguard Worker  %bptr = getelementptr double, double addrspace(1)* %aptr, i32 1
16*9880d681SAndroid Build Coastguard Worker  %cptr = getelementptr double, double addrspace(1)* %aptr, i32 2
17*9880d681SAndroid Build Coastguard Worker  %a = load volatile double, double addrspace(1)* %aptr, align 8
18*9880d681SAndroid Build Coastguard Worker  %b = load volatile double, double addrspace(1)* %bptr, align 8
19*9880d681SAndroid Build Coastguard Worker  %c = load volatile double, double addrspace(1)* %cptr, align 8
20*9880d681SAndroid Build Coastguard Worker  %f0 = call double @llvm.maxnum.f64(double %a, double %b) nounwind readnone
21*9880d681SAndroid Build Coastguard Worker  %f1 = call double @llvm.maxnum.f64(double %f0, double %c) nounwind readnone
22*9880d681SAndroid Build Coastguard Worker  store double %f1, double addrspace(1)* %out, align 8
23*9880d681SAndroid Build Coastguard Worker  ret void
24*9880d681SAndroid Build Coastguard Worker}
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