1*9880d681SAndroid Build Coastguard Worker;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s 2*9880d681SAndroid Build Coastguard Worker 3*9880d681SAndroid Build Coastguard Worker;CHECK: MULADD_IEEE * {{T[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 4*9880d681SAndroid Build Coastguard Worker 5*9880d681SAndroid Build Coastguard Workerdefine amdgpu_ps void @test(<4 x float> inreg %reg0) { 6*9880d681SAndroid Build Coastguard Worker %r0 = extractelement <4 x float> %reg0, i32 0 7*9880d681SAndroid Build Coastguard Worker %r1 = extractelement <4 x float> %reg0, i32 1 8*9880d681SAndroid Build Coastguard Worker %r2 = extractelement <4 x float> %reg0, i32 2 9*9880d681SAndroid Build Coastguard Worker %r3 = fmul float %r0, %r1 10*9880d681SAndroid Build Coastguard Worker %r4 = fadd float %r3, %r2 11*9880d681SAndroid Build Coastguard Worker %vec = insertelement <4 x float> undef, float %r4, i32 0 12*9880d681SAndroid Build Coastguard Worker call void @llvm.R600.store.swizzle(<4 x float> %vec, i32 0, i32 0) 13*9880d681SAndroid Build Coastguard Worker ret void 14*9880d681SAndroid Build Coastguard Worker} 15*9880d681SAndroid Build Coastguard Worker 16*9880d681SAndroid Build Coastguard Workerdeclare float @fabs(float ) readnone 17*9880d681SAndroid Build Coastguard Workerdeclare void @llvm.R600.store.swizzle(<4 x float>, i32, i32) 18