xref: /aosp_15_r20/external/llvm/test/CodeGen/AMDGPU/codegen-prepare-addrmode-sext.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58) 
1*9880d681SAndroid Build Coastguard Worker; RUN: opt -mtriple=amdgcn-- -codegenprepare -S < %s | FileCheck -check-prefix=OPT %s
2*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI-LLC %s
3*9880d681SAndroid Build Coastguard Worker
4*9880d681SAndroid Build Coastguard Worker; OPT-LABEL: @test(
5*9880d681SAndroid Build Coastguard Worker; OPT: mul nsw i32
6*9880d681SAndroid Build Coastguard Worker; OPT-NEXT: sext
7*9880d681SAndroid Build Coastguard Worker
8*9880d681SAndroid Build Coastguard Worker; SI-LLC-LABEL: {{^}}test:
9*9880d681SAndroid Build Coastguard Worker; SI-LLC: s_mul_i32
10*9880d681SAndroid Build Coastguard Worker; SI-LLC-NOT: mul
11*9880d681SAndroid Build Coastguard Workerdefine void @test(i8 addrspace(1)* nocapture readonly %in, i32 %a, i8 %b) {
12*9880d681SAndroid Build Coastguard Workerentry:
13*9880d681SAndroid Build Coastguard Worker  %0 = mul nsw i32 %a, 3
14*9880d681SAndroid Build Coastguard Worker  %1 = sext i32 %0 to i64
15*9880d681SAndroid Build Coastguard Worker  %2 = getelementptr i8, i8 addrspace(1)* %in, i64 %1
16*9880d681SAndroid Build Coastguard Worker  store i8 %b, i8 addrspace(1)* %2
17*9880d681SAndroid Build Coastguard Worker  ret void
18*9880d681SAndroid Build Coastguard Worker}
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