1*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -O3 -march=aarch64 -mcpu=cortex-a53 | FileCheck %s 2*9880d681SAndroid Build Coastguard Worker 3*9880d681SAndroid Build Coastguard Worker; With cortex-a53, each of fmul and fcvt have latency of 6 cycles. After the 4*9880d681SAndroid Build Coastguard Worker; pre-RA MI scheduler, fmul, fcvt and fdiv will be consecutive. The top-down 5*9880d681SAndroid Build Coastguard Worker; post-RA MI scheduler will clean this up. 6*9880d681SAndroid Build Coastguard Worker 7*9880d681SAndroid Build Coastguard Worker@d1 = common global double 0.000000e+00, align 8 8*9880d681SAndroid Build Coastguard Worker 9*9880d681SAndroid Build Coastguard Workerdefine i32 @test1(float %s2, float %s3, double %d, i32 %i2, i32 %i3) { 10*9880d681SAndroid Build Coastguard Workerentry: 11*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: @test1 12*9880d681SAndroid Build Coastguard Worker; CHECK: fmul 13*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: add 14*9880d681SAndroid Build Coastguard Worker; CHECK: fcvt 15*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: mul 16*9880d681SAndroid Build Coastguard Worker %mul = fmul float %s2, %s3 17*9880d681SAndroid Build Coastguard Worker %conv = fpext float %mul to double 18*9880d681SAndroid Build Coastguard Worker %div = fdiv double %d, %conv 19*9880d681SAndroid Build Coastguard Worker store double %div, double* @d1, align 8 20*9880d681SAndroid Build Coastguard Worker %factor = shl i32 %i3, 1 21*9880d681SAndroid Build Coastguard Worker %add1 = add i32 %i2, 4 22*9880d681SAndroid Build Coastguard Worker %add2 = add i32 %add1, %factor 23*9880d681SAndroid Build Coastguard Worker %add3 = add nsw i32 %add2, %i2 24*9880d681SAndroid Build Coastguard Worker %add4 = add nsw i32 %add3, %add2 25*9880d681SAndroid Build Coastguard Worker %mul5 = mul i32 %add3, %add3 26*9880d681SAndroid Build Coastguard Worker %mul6 = mul i32 %mul5, %add4 27*9880d681SAndroid Build Coastguard Worker %mul7 = shl i32 %add4, 1 28*9880d681SAndroid Build Coastguard Worker %factor18 = mul i32 %mul7, %mul6 29*9880d681SAndroid Build Coastguard Worker %add9 = add i32 %factor18, %mul6 30*9880d681SAndroid Build Coastguard Worker ret i32 %add9 31*9880d681SAndroid Build Coastguard Worker} 32