1*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple | FileCheck %s 2*9880d681SAndroid Build Coastguard Worker 3*9880d681SAndroid Build Coastguard Worker; LowerCONCAT_VECTORS() was reversing the order of two parts. 4*9880d681SAndroid Build Coastguard Worker; rdar://11558157 5*9880d681SAndroid Build Coastguard Worker; rdar://11559553 6*9880d681SAndroid Build Coastguard Workerdefine <16 x i8> @test(<16 x i8> %q0, <16 x i8> %q1, i8* nocapture %dest) nounwind { 7*9880d681SAndroid Build Coastguard Workerentry: 8*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: test: 9*9880d681SAndroid Build Coastguard Worker; CHECK: ins.d v0[1], v1[0] 10*9880d681SAndroid Build Coastguard Worker %0 = bitcast <16 x i8> %q0 to <2 x i64> 11*9880d681SAndroid Build Coastguard Worker %shuffle.i = shufflevector <2 x i64> %0, <2 x i64> undef, <1 x i32> zeroinitializer 12*9880d681SAndroid Build Coastguard Worker %1 = bitcast <16 x i8> %q1 to <2 x i64> 13*9880d681SAndroid Build Coastguard Worker %shuffle.i4 = shufflevector <2 x i64> %1, <2 x i64> undef, <1 x i32> zeroinitializer 14*9880d681SAndroid Build Coastguard Worker %shuffle.i3 = shufflevector <1 x i64> %shuffle.i, <1 x i64> %shuffle.i4, <2 x i32> <i32 0, i32 1> 15*9880d681SAndroid Build Coastguard Worker %2 = bitcast <2 x i64> %shuffle.i3 to <16 x i8> 16*9880d681SAndroid Build Coastguard Worker ret <16 x i8> %2 17*9880d681SAndroid Build Coastguard Worker} 18