xref: /aosp_15_r20/external/llvm/test/CodeGen/AArch64/arm64-neon-copyPhysReg-tuple.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58) 
1*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-none-linux-gnu -mattr=+neon | FileCheck %s
2*9880d681SAndroid Build Coastguard Worker; arm64 has a separate copy due to intrinsics
3*9880d681SAndroid Build Coastguard Worker
4*9880d681SAndroid Build Coastguard Workerdefine <4 x i32> @copyTuple.QPair(i32* %a, i32* %b) {
5*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: copyTuple.QPair:
6*9880d681SAndroid Build Coastguard Worker; CHECK: mov v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
7*9880d681SAndroid Build Coastguard Worker; CHECK: mov v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
8*9880d681SAndroid Build Coastguard Worker; CHECK: ld2 { {{v[0-9]+}}.s, {{v[0-9]+}}.s }[{{[0-9]+}}], [x{{[0-9]+|sp}}]
9*9880d681SAndroid Build Coastguard Workerentry:
10*9880d681SAndroid Build Coastguard Worker  %vld = tail call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32.p0i32(<4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> <i32 2, i32 2, i32 2, i32 2>, i64 1, i32* %a)
11*9880d681SAndroid Build Coastguard Worker  %extract = extractvalue { <4 x i32>, <4 x i32> } %vld, 0
12*9880d681SAndroid Build Coastguard Worker  %vld1 = tail call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32.p0i32(<4 x i32> %extract, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, i64 1, i32* %b)
13*9880d681SAndroid Build Coastguard Worker  %vld1.fca.0.extract = extractvalue { <4 x i32>, <4 x i32> } %vld1, 0
14*9880d681SAndroid Build Coastguard Worker  ret <4 x i32> %vld1.fca.0.extract
15*9880d681SAndroid Build Coastguard Worker}
16*9880d681SAndroid Build Coastguard Worker
17*9880d681SAndroid Build Coastguard Workerdefine <4 x i32> @copyTuple.QTriple(i32* %a, i32* %b, <4 x i32> %c) {
18*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: copyTuple.QTriple:
19*9880d681SAndroid Build Coastguard Worker; CHECK: mov v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
20*9880d681SAndroid Build Coastguard Worker; CHECK: mov v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
21*9880d681SAndroid Build Coastguard Worker; CHECK: mov v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
22*9880d681SAndroid Build Coastguard Worker; CHECK: ld3 { {{v[0-9]+}}.s, {{v[0-9]+}}.s, {{v[0-9]+}}.s }[{{[0-9]+}}], [x{{[0-9]+|sp}}]
23*9880d681SAndroid Build Coastguard Workerentry:
24*9880d681SAndroid Build Coastguard Worker  %vld = tail call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32.p0i32(<4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> %c, <4 x i32> %c, i64 1, i32* %a)
25*9880d681SAndroid Build Coastguard Worker  %extract = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } %vld, 0
26*9880d681SAndroid Build Coastguard Worker  %vld1 = tail call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32.p0i32(<4 x i32> %extract, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> %c, i64 1, i32* %b)
27*9880d681SAndroid Build Coastguard Worker  %vld1.fca.0.extract = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } %vld1, 0
28*9880d681SAndroid Build Coastguard Worker  ret <4 x i32> %vld1.fca.0.extract
29*9880d681SAndroid Build Coastguard Worker}
30*9880d681SAndroid Build Coastguard Worker
31*9880d681SAndroid Build Coastguard Workerdefine <4 x i32> @copyTuple.QQuad(i32* %a, i32* %b, <4 x i32> %c) {
32*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: copyTuple.QQuad:
33*9880d681SAndroid Build Coastguard Worker; CHECK: mov v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
34*9880d681SAndroid Build Coastguard Worker; CHECK: mov v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
35*9880d681SAndroid Build Coastguard Worker; CHECK: mov v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
36*9880d681SAndroid Build Coastguard Worker; CHECK: mov v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
37*9880d681SAndroid Build Coastguard Worker; CHECK: ld4 { {{v[0-9]+}}.s, {{v[0-9]+}}.s, {{v[0-9]+}}.s, {{v[0-9]+}}.s }[{{[0-9]+}}], [x{{[0-9]+|sp}}]
38*9880d681SAndroid Build Coastguard Workerentry:
39*9880d681SAndroid Build Coastguard Worker  %vld = tail call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32.p0i32(<4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> %c, <4 x i32> %c, <4 x i32> %c, i64 1, i32* %a)
40*9880d681SAndroid Build Coastguard Worker  %extract = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } %vld, 0
41*9880d681SAndroid Build Coastguard Worker  %vld1 = tail call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32.p0i32(<4 x i32> %extract, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> %c, <4 x i32> %c, i64 1, i32* %b)
42*9880d681SAndroid Build Coastguard Worker  %vld1.fca.0.extract = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } %vld1, 0
43*9880d681SAndroid Build Coastguard Worker  ret <4 x i32> %vld1.fca.0.extract
44*9880d681SAndroid Build Coastguard Worker}
45*9880d681SAndroid Build Coastguard Worker
46*9880d681SAndroid Build Coastguard Workerdeclare { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32.p0i32(<4 x i32>, <4 x i32>, i64, i32*)
47*9880d681SAndroid Build Coastguard Workerdeclare { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32.p0i32(<4 x i32>, <4 x i32>, <4 x i32>, i64, i32*)
48*9880d681SAndroid Build Coastguard Workerdeclare { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32.p0i32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i64, i32*)
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