xref: /aosp_15_r20/external/llvm/test/CodeGen/AArch64/arm64-coalesce-ext.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc -march=arm64 -mtriple=arm64-apple-darwin < %s | FileCheck %s
2*9880d681SAndroid Build Coastguard Worker; Check that the peephole optimizer knows about sext and zext instructions.
3*9880d681SAndroid Build Coastguard Worker; CHECK: test1sext
4*9880d681SAndroid Build Coastguard Workerdefine i32 @test1sext(i64 %A, i64 %B, i32* %P, i64 *%P2) nounwind {
5*9880d681SAndroid Build Coastguard Worker  %C = add i64 %A, %B
6*9880d681SAndroid Build Coastguard Worker  ; CHECK: add x[[SUM:[0-9]+]], x0, x1
7*9880d681SAndroid Build Coastguard Worker  %D = trunc i64 %C to i32
8*9880d681SAndroid Build Coastguard Worker  %E = shl i64 %C, 32
9*9880d681SAndroid Build Coastguard Worker  %F = ashr i64 %E, 32
10*9880d681SAndroid Build Coastguard Worker  ; CHECK: sxtw x[[EXT:[0-9]+]], w[[SUM]]
11*9880d681SAndroid Build Coastguard Worker  store volatile i64 %F, i64 *%P2
12*9880d681SAndroid Build Coastguard Worker  ; CHECK: str x[[EXT]]
13*9880d681SAndroid Build Coastguard Worker  store volatile i32 %D, i32* %P
14*9880d681SAndroid Build Coastguard Worker  ; Reuse low bits of extended register, don't extend live range of SUM.
15*9880d681SAndroid Build Coastguard Worker  ; CHECK: str w[[SUM]]
16*9880d681SAndroid Build Coastguard Worker  ret i32 %D
17*9880d681SAndroid Build Coastguard Worker}
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