1*9880d681SAndroid Build Coastguard Worker; RUN: opt %s -mtriple amdgcn-- -analyze -divergence | FileCheck %s 2*9880d681SAndroid Build Coastguard Worker 3*9880d681SAndroid Build Coastguard Worker; CHECK: DIVERGENT: 4*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %arg0 5*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %arg1 6*9880d681SAndroid Build Coastguard Worker; CHECK-NOT; %arg2 7*9880d681SAndroid Build Coastguard Worker; CHECK: <2 x i32> %arg3 8*9880d681SAndroid Build Coastguard Worker; CHECK: DIVERGENT: <3 x i32> %arg4 9*9880d681SAndroid Build Coastguard Worker; CHECK: DIVERGENT: float %arg5 10*9880d681SAndroid Build Coastguard Worker; CHECK: DIVERGENT: i32 %arg6 11*9880d681SAndroid Build Coastguard Worker 12*9880d681SAndroid Build Coastguard Workerdefine amdgpu_ps void @main([4 x <16 x i8>] addrspace(2)* byval %arg0, float inreg %arg1, i32 inreg %arg2, <2 x i32> %arg3, <3 x i32> %arg4, float %arg5, i32 %arg6) #0 { 13*9880d681SAndroid Build Coastguard Worker ret void 14*9880d681SAndroid Build Coastguard Worker} 15*9880d681SAndroid Build Coastguard Worker 16*9880d681SAndroid Build Coastguard Workerattributes #0 = { nounwind } 17