1*9880d681SAndroid Build Coastguard Worker //===-- NVPTXMCTargetDesc.cpp - NVPTX Target Descriptions -------*- C++ -*-===//
2*9880d681SAndroid Build Coastguard Worker //
3*9880d681SAndroid Build Coastguard Worker // The LLVM Compiler Infrastructure
4*9880d681SAndroid Build Coastguard Worker //
5*9880d681SAndroid Build Coastguard Worker // This file is distributed under the University of Illinois Open Source
6*9880d681SAndroid Build Coastguard Worker // License. See LICENSE.TXT for details.
7*9880d681SAndroid Build Coastguard Worker //
8*9880d681SAndroid Build Coastguard Worker //===----------------------------------------------------------------------===//
9*9880d681SAndroid Build Coastguard Worker //
10*9880d681SAndroid Build Coastguard Worker // This file provides NVPTX specific target descriptions.
11*9880d681SAndroid Build Coastguard Worker //
12*9880d681SAndroid Build Coastguard Worker //===----------------------------------------------------------------------===//
13*9880d681SAndroid Build Coastguard Worker
14*9880d681SAndroid Build Coastguard Worker #include "NVPTXMCTargetDesc.h"
15*9880d681SAndroid Build Coastguard Worker #include "InstPrinter/NVPTXInstPrinter.h"
16*9880d681SAndroid Build Coastguard Worker #include "NVPTXMCAsmInfo.h"
17*9880d681SAndroid Build Coastguard Worker #include "llvm/MC/MCInstrInfo.h"
18*9880d681SAndroid Build Coastguard Worker #include "llvm/MC/MCRegisterInfo.h"
19*9880d681SAndroid Build Coastguard Worker #include "llvm/MC/MCSubtargetInfo.h"
20*9880d681SAndroid Build Coastguard Worker #include "llvm/Support/TargetRegistry.h"
21*9880d681SAndroid Build Coastguard Worker
22*9880d681SAndroid Build Coastguard Worker using namespace llvm;
23*9880d681SAndroid Build Coastguard Worker
24*9880d681SAndroid Build Coastguard Worker #define GET_INSTRINFO_MC_DESC
25*9880d681SAndroid Build Coastguard Worker #include "NVPTXGenInstrInfo.inc"
26*9880d681SAndroid Build Coastguard Worker
27*9880d681SAndroid Build Coastguard Worker #define GET_SUBTARGETINFO_MC_DESC
28*9880d681SAndroid Build Coastguard Worker #include "NVPTXGenSubtargetInfo.inc"
29*9880d681SAndroid Build Coastguard Worker
30*9880d681SAndroid Build Coastguard Worker #define GET_REGINFO_MC_DESC
31*9880d681SAndroid Build Coastguard Worker #include "NVPTXGenRegisterInfo.inc"
32*9880d681SAndroid Build Coastguard Worker
createNVPTXMCInstrInfo()33*9880d681SAndroid Build Coastguard Worker static MCInstrInfo *createNVPTXMCInstrInfo() {
34*9880d681SAndroid Build Coastguard Worker MCInstrInfo *X = new MCInstrInfo();
35*9880d681SAndroid Build Coastguard Worker InitNVPTXMCInstrInfo(X);
36*9880d681SAndroid Build Coastguard Worker return X;
37*9880d681SAndroid Build Coastguard Worker }
38*9880d681SAndroid Build Coastguard Worker
createNVPTXMCRegisterInfo(const Triple & TT)39*9880d681SAndroid Build Coastguard Worker static MCRegisterInfo *createNVPTXMCRegisterInfo(const Triple &TT) {
40*9880d681SAndroid Build Coastguard Worker MCRegisterInfo *X = new MCRegisterInfo();
41*9880d681SAndroid Build Coastguard Worker // PTX does not have a return address register.
42*9880d681SAndroid Build Coastguard Worker InitNVPTXMCRegisterInfo(X, 0);
43*9880d681SAndroid Build Coastguard Worker return X;
44*9880d681SAndroid Build Coastguard Worker }
45*9880d681SAndroid Build Coastguard Worker
46*9880d681SAndroid Build Coastguard Worker static MCSubtargetInfo *
createNVPTXMCSubtargetInfo(const Triple & TT,StringRef CPU,StringRef FS)47*9880d681SAndroid Build Coastguard Worker createNVPTXMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) {
48*9880d681SAndroid Build Coastguard Worker return createNVPTXMCSubtargetInfoImpl(TT, CPU, FS);
49*9880d681SAndroid Build Coastguard Worker }
50*9880d681SAndroid Build Coastguard Worker
createNVPTXMCInstPrinter(const Triple & T,unsigned SyntaxVariant,const MCAsmInfo & MAI,const MCInstrInfo & MII,const MCRegisterInfo & MRI)51*9880d681SAndroid Build Coastguard Worker static MCInstPrinter *createNVPTXMCInstPrinter(const Triple &T,
52*9880d681SAndroid Build Coastguard Worker unsigned SyntaxVariant,
53*9880d681SAndroid Build Coastguard Worker const MCAsmInfo &MAI,
54*9880d681SAndroid Build Coastguard Worker const MCInstrInfo &MII,
55*9880d681SAndroid Build Coastguard Worker const MCRegisterInfo &MRI) {
56*9880d681SAndroid Build Coastguard Worker if (SyntaxVariant == 0)
57*9880d681SAndroid Build Coastguard Worker return new NVPTXInstPrinter(MAI, MII, MRI);
58*9880d681SAndroid Build Coastguard Worker return nullptr;
59*9880d681SAndroid Build Coastguard Worker }
60*9880d681SAndroid Build Coastguard Worker
61*9880d681SAndroid Build Coastguard Worker // Force static initialization.
LLVMInitializeNVPTXTargetMC()62*9880d681SAndroid Build Coastguard Worker extern "C" void LLVMInitializeNVPTXTargetMC() {
63*9880d681SAndroid Build Coastguard Worker for (Target *T : {&TheNVPTXTarget32, &TheNVPTXTarget64}) {
64*9880d681SAndroid Build Coastguard Worker // Register the MC asm info.
65*9880d681SAndroid Build Coastguard Worker RegisterMCAsmInfo<NVPTXMCAsmInfo> X(*T);
66*9880d681SAndroid Build Coastguard Worker
67*9880d681SAndroid Build Coastguard Worker // Register the MC instruction info.
68*9880d681SAndroid Build Coastguard Worker TargetRegistry::RegisterMCInstrInfo(*T, createNVPTXMCInstrInfo);
69*9880d681SAndroid Build Coastguard Worker
70*9880d681SAndroid Build Coastguard Worker // Register the MC register info.
71*9880d681SAndroid Build Coastguard Worker TargetRegistry::RegisterMCRegInfo(*T, createNVPTXMCRegisterInfo);
72*9880d681SAndroid Build Coastguard Worker
73*9880d681SAndroid Build Coastguard Worker // Register the MC subtarget info.
74*9880d681SAndroid Build Coastguard Worker TargetRegistry::RegisterMCSubtargetInfo(*T, createNVPTXMCSubtargetInfo);
75*9880d681SAndroid Build Coastguard Worker
76*9880d681SAndroid Build Coastguard Worker // Register the MCInstPrinter.
77*9880d681SAndroid Build Coastguard Worker TargetRegistry::RegisterMCInstPrinter(*T, createNVPTXMCInstPrinter);
78*9880d681SAndroid Build Coastguard Worker }
79*9880d681SAndroid Build Coastguard Worker }
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