1*9880d681SAndroid Build Coastguard Worker //===-- MipsRegisterInfo.h - Mips Register Information Impl -----*- C++ -*-===// 2*9880d681SAndroid Build Coastguard Worker // 3*9880d681SAndroid Build Coastguard Worker // The LLVM Compiler Infrastructure 4*9880d681SAndroid Build Coastguard Worker // 5*9880d681SAndroid Build Coastguard Worker // This file is distributed under the University of Illinois Open Source 6*9880d681SAndroid Build Coastguard Worker // License. See LICENSE.TXT for details. 7*9880d681SAndroid Build Coastguard Worker // 8*9880d681SAndroid Build Coastguard Worker //===----------------------------------------------------------------------===// 9*9880d681SAndroid Build Coastguard Worker // 10*9880d681SAndroid Build Coastguard Worker // This file contains the Mips implementation of the TargetRegisterInfo class. 11*9880d681SAndroid Build Coastguard Worker // 12*9880d681SAndroid Build Coastguard Worker //===----------------------------------------------------------------------===// 13*9880d681SAndroid Build Coastguard Worker 14*9880d681SAndroid Build Coastguard Worker #ifndef LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H 15*9880d681SAndroid Build Coastguard Worker #define LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H 16*9880d681SAndroid Build Coastguard Worker 17*9880d681SAndroid Build Coastguard Worker #include "Mips.h" 18*9880d681SAndroid Build Coastguard Worker #include "llvm/Target/TargetRegisterInfo.h" 19*9880d681SAndroid Build Coastguard Worker 20*9880d681SAndroid Build Coastguard Worker #define GET_REGINFO_HEADER 21*9880d681SAndroid Build Coastguard Worker #include "MipsGenRegisterInfo.inc" 22*9880d681SAndroid Build Coastguard Worker 23*9880d681SAndroid Build Coastguard Worker namespace llvm { 24*9880d681SAndroid Build Coastguard Worker class MipsRegisterInfo : public MipsGenRegisterInfo { 25*9880d681SAndroid Build Coastguard Worker public: 26*9880d681SAndroid Build Coastguard Worker enum class MipsPtrClass { 27*9880d681SAndroid Build Coastguard Worker /// The default register class for integer values. 28*9880d681SAndroid Build Coastguard Worker Default = 0, 29*9880d681SAndroid Build Coastguard Worker /// The subset of registers permitted in certain microMIPS instructions 30*9880d681SAndroid Build Coastguard Worker /// such as lw16. 31*9880d681SAndroid Build Coastguard Worker GPR16MM = 1, 32*9880d681SAndroid Build Coastguard Worker /// The stack pointer only. 33*9880d681SAndroid Build Coastguard Worker StackPointer = 2, 34*9880d681SAndroid Build Coastguard Worker /// The global pointer only. 35*9880d681SAndroid Build Coastguard Worker GlobalPointer = 3, 36*9880d681SAndroid Build Coastguard Worker }; 37*9880d681SAndroid Build Coastguard Worker 38*9880d681SAndroid Build Coastguard Worker MipsRegisterInfo(); 39*9880d681SAndroid Build Coastguard Worker 40*9880d681SAndroid Build Coastguard Worker /// Get PIC indirect call register 41*9880d681SAndroid Build Coastguard Worker static unsigned getPICCallReg(); 42*9880d681SAndroid Build Coastguard Worker 43*9880d681SAndroid Build Coastguard Worker /// Code Generation virtual methods... 44*9880d681SAndroid Build Coastguard Worker const TargetRegisterClass *getPointerRegClass(const MachineFunction &MF, 45*9880d681SAndroid Build Coastguard Worker unsigned Kind) const override; 46*9880d681SAndroid Build Coastguard Worker 47*9880d681SAndroid Build Coastguard Worker unsigned getRegPressureLimit(const TargetRegisterClass *RC, 48*9880d681SAndroid Build Coastguard Worker MachineFunction &MF) const override; 49*9880d681SAndroid Build Coastguard Worker const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override; 50*9880d681SAndroid Build Coastguard Worker const uint32_t *getCallPreservedMask(const MachineFunction &MF, 51*9880d681SAndroid Build Coastguard Worker CallingConv::ID) const override; 52*9880d681SAndroid Build Coastguard Worker static const uint32_t *getMips16RetHelperMask(); 53*9880d681SAndroid Build Coastguard Worker 54*9880d681SAndroid Build Coastguard Worker BitVector getReservedRegs(const MachineFunction &MF) const override; 55*9880d681SAndroid Build Coastguard Worker 56*9880d681SAndroid Build Coastguard Worker bool requiresRegisterScavenging(const MachineFunction &MF) const override; 57*9880d681SAndroid Build Coastguard Worker 58*9880d681SAndroid Build Coastguard Worker bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override; 59*9880d681SAndroid Build Coastguard Worker 60*9880d681SAndroid Build Coastguard Worker /// Stack Frame Processing Methods 61*9880d681SAndroid Build Coastguard Worker void eliminateFrameIndex(MachineBasicBlock::iterator II, 62*9880d681SAndroid Build Coastguard Worker int SPAdj, unsigned FIOperandNum, 63*9880d681SAndroid Build Coastguard Worker RegScavenger *RS = nullptr) const override; 64*9880d681SAndroid Build Coastguard Worker 65*9880d681SAndroid Build Coastguard Worker // Stack realignment queries. 66*9880d681SAndroid Build Coastguard Worker bool canRealignStack(const MachineFunction &MF) const override; 67*9880d681SAndroid Build Coastguard Worker 68*9880d681SAndroid Build Coastguard Worker /// Debug information queries. 69*9880d681SAndroid Build Coastguard Worker unsigned getFrameRegister(const MachineFunction &MF) const override; 70*9880d681SAndroid Build Coastguard Worker 71*9880d681SAndroid Build Coastguard Worker /// \brief Return GPR register class. 72*9880d681SAndroid Build Coastguard Worker virtual const TargetRegisterClass *intRegClass(unsigned Size) const = 0; 73*9880d681SAndroid Build Coastguard Worker 74*9880d681SAndroid Build Coastguard Worker private: 75*9880d681SAndroid Build Coastguard Worker virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo, 76*9880d681SAndroid Build Coastguard Worker int FrameIndex, uint64_t StackSize, 77*9880d681SAndroid Build Coastguard Worker int64_t SPOffset) const = 0; 78*9880d681SAndroid Build Coastguard Worker }; 79*9880d681SAndroid Build Coastguard Worker 80*9880d681SAndroid Build Coastguard Worker } // end namespace llvm 81*9880d681SAndroid Build Coastguard Worker 82*9880d681SAndroid Build Coastguard Worker #endif 83