xref: /aosp_15_r20/external/llvm/lib/CodeGen/RegisterCoalescer.h (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker //===-- RegisterCoalescer.h - Register Coalescing Interface -----*- C++ -*-===//
2*9880d681SAndroid Build Coastguard Worker //
3*9880d681SAndroid Build Coastguard Worker //                     The LLVM Compiler Infrastructure
4*9880d681SAndroid Build Coastguard Worker //
5*9880d681SAndroid Build Coastguard Worker // This file is distributed under the University of Illinois Open Source
6*9880d681SAndroid Build Coastguard Worker // License. See LICENSE.TXT for details.
7*9880d681SAndroid Build Coastguard Worker //
8*9880d681SAndroid Build Coastguard Worker //===----------------------------------------------------------------------===//
9*9880d681SAndroid Build Coastguard Worker //
10*9880d681SAndroid Build Coastguard Worker // This file contains the abstract interface for register coalescers,
11*9880d681SAndroid Build Coastguard Worker // allowing them to interact with and query register allocators.
12*9880d681SAndroid Build Coastguard Worker //
13*9880d681SAndroid Build Coastguard Worker //===----------------------------------------------------------------------===//
14*9880d681SAndroid Build Coastguard Worker 
15*9880d681SAndroid Build Coastguard Worker #ifndef LLVM_LIB_CODEGEN_REGISTERCOALESCER_H
16*9880d681SAndroid Build Coastguard Worker #define LLVM_LIB_CODEGEN_REGISTERCOALESCER_H
17*9880d681SAndroid Build Coastguard Worker 
18*9880d681SAndroid Build Coastguard Worker namespace llvm {
19*9880d681SAndroid Build Coastguard Worker 
20*9880d681SAndroid Build Coastguard Worker   class MachineInstr;
21*9880d681SAndroid Build Coastguard Worker   class TargetRegisterInfo;
22*9880d681SAndroid Build Coastguard Worker   class TargetRegisterClass;
23*9880d681SAndroid Build Coastguard Worker   class TargetInstrInfo;
24*9880d681SAndroid Build Coastguard Worker 
25*9880d681SAndroid Build Coastguard Worker   /// A helper class for register coalescers. When deciding if
26*9880d681SAndroid Build Coastguard Worker   /// two registers can be coalesced, CoalescerPair can determine if a copy
27*9880d681SAndroid Build Coastguard Worker   /// instruction would become an identity copy after coalescing.
28*9880d681SAndroid Build Coastguard Worker   class CoalescerPair {
29*9880d681SAndroid Build Coastguard Worker     const TargetRegisterInfo &TRI;
30*9880d681SAndroid Build Coastguard Worker 
31*9880d681SAndroid Build Coastguard Worker     /// The register that will be left after coalescing. It can be a
32*9880d681SAndroid Build Coastguard Worker     /// virtual or physical register.
33*9880d681SAndroid Build Coastguard Worker     unsigned DstReg;
34*9880d681SAndroid Build Coastguard Worker 
35*9880d681SAndroid Build Coastguard Worker     /// The virtual register that will be coalesced into dstReg.
36*9880d681SAndroid Build Coastguard Worker     unsigned SrcReg;
37*9880d681SAndroid Build Coastguard Worker 
38*9880d681SAndroid Build Coastguard Worker     /// The sub-register index of the old DstReg in the new coalesced register.
39*9880d681SAndroid Build Coastguard Worker     unsigned DstIdx;
40*9880d681SAndroid Build Coastguard Worker 
41*9880d681SAndroid Build Coastguard Worker     /// The sub-register index of the old SrcReg in the new coalesced register.
42*9880d681SAndroid Build Coastguard Worker     unsigned SrcIdx;
43*9880d681SAndroid Build Coastguard Worker 
44*9880d681SAndroid Build Coastguard Worker     /// True when the original copy was a partial subregister copy.
45*9880d681SAndroid Build Coastguard Worker     bool Partial;
46*9880d681SAndroid Build Coastguard Worker 
47*9880d681SAndroid Build Coastguard Worker     /// True when both regs are virtual and newRC is constrained.
48*9880d681SAndroid Build Coastguard Worker     bool CrossClass;
49*9880d681SAndroid Build Coastguard Worker 
50*9880d681SAndroid Build Coastguard Worker     /// True when DstReg and SrcReg are reversed from the original
51*9880d681SAndroid Build Coastguard Worker     /// copy instruction.
52*9880d681SAndroid Build Coastguard Worker     bool Flipped;
53*9880d681SAndroid Build Coastguard Worker 
54*9880d681SAndroid Build Coastguard Worker     /// The register class of the coalesced register, or NULL if DstReg
55*9880d681SAndroid Build Coastguard Worker     /// is a physreg. This register class may be a super-register of both
56*9880d681SAndroid Build Coastguard Worker     /// SrcReg and DstReg.
57*9880d681SAndroid Build Coastguard Worker     const TargetRegisterClass *NewRC;
58*9880d681SAndroid Build Coastguard Worker 
59*9880d681SAndroid Build Coastguard Worker   public:
CoalescerPair(const TargetRegisterInfo & tri)60*9880d681SAndroid Build Coastguard Worker     CoalescerPair(const TargetRegisterInfo &tri)
61*9880d681SAndroid Build Coastguard Worker       : TRI(tri), DstReg(0), SrcReg(0), DstIdx(0), SrcIdx(0),
62*9880d681SAndroid Build Coastguard Worker         Partial(false), CrossClass(false), Flipped(false), NewRC(nullptr) {}
63*9880d681SAndroid Build Coastguard Worker 
64*9880d681SAndroid Build Coastguard Worker     /// Create a CoalescerPair representing a virtreg-to-physreg copy.
65*9880d681SAndroid Build Coastguard Worker     /// No need to call setRegisters().
CoalescerPair(unsigned VirtReg,unsigned PhysReg,const TargetRegisterInfo & tri)66*9880d681SAndroid Build Coastguard Worker     CoalescerPair(unsigned VirtReg, unsigned PhysReg,
67*9880d681SAndroid Build Coastguard Worker                   const TargetRegisterInfo &tri)
68*9880d681SAndroid Build Coastguard Worker       : TRI(tri), DstReg(PhysReg), SrcReg(VirtReg), DstIdx(0), SrcIdx(0),
69*9880d681SAndroid Build Coastguard Worker         Partial(false), CrossClass(false), Flipped(false), NewRC(nullptr) {}
70*9880d681SAndroid Build Coastguard Worker 
71*9880d681SAndroid Build Coastguard Worker     /// Set registers to match the copy instruction MI. Return
72*9880d681SAndroid Build Coastguard Worker     /// false if MI is not a coalescable copy instruction.
73*9880d681SAndroid Build Coastguard Worker     bool setRegisters(const MachineInstr*);
74*9880d681SAndroid Build Coastguard Worker 
75*9880d681SAndroid Build Coastguard Worker     /// Swap SrcReg and DstReg. Return false if swapping is impossible
76*9880d681SAndroid Build Coastguard Worker     /// because DstReg is a physical register, or SubIdx is set.
77*9880d681SAndroid Build Coastguard Worker     bool flip();
78*9880d681SAndroid Build Coastguard Worker 
79*9880d681SAndroid Build Coastguard Worker     /// Return true if MI is a copy instruction that will become
80*9880d681SAndroid Build Coastguard Worker     /// an identity copy after coalescing.
81*9880d681SAndroid Build Coastguard Worker     bool isCoalescable(const MachineInstr*) const;
82*9880d681SAndroid Build Coastguard Worker 
83*9880d681SAndroid Build Coastguard Worker     /// Return true if DstReg is a physical register.
isPhys()84*9880d681SAndroid Build Coastguard Worker     bool isPhys() const { return !NewRC; }
85*9880d681SAndroid Build Coastguard Worker 
86*9880d681SAndroid Build Coastguard Worker     /// Return true if the original copy instruction did not copy
87*9880d681SAndroid Build Coastguard Worker     /// the full register, but was a subreg operation.
isPartial()88*9880d681SAndroid Build Coastguard Worker     bool isPartial() const { return Partial; }
89*9880d681SAndroid Build Coastguard Worker 
90*9880d681SAndroid Build Coastguard Worker     /// Return true if DstReg is virtual and NewRC is a smaller
91*9880d681SAndroid Build Coastguard Worker     /// register class than DstReg's.
isCrossClass()92*9880d681SAndroid Build Coastguard Worker     bool isCrossClass() const { return CrossClass; }
93*9880d681SAndroid Build Coastguard Worker 
94*9880d681SAndroid Build Coastguard Worker     /// Return true when getSrcReg is the register being defined by
95*9880d681SAndroid Build Coastguard Worker     /// the original copy instruction.
isFlipped()96*9880d681SAndroid Build Coastguard Worker     bool isFlipped() const { return Flipped; }
97*9880d681SAndroid Build Coastguard Worker 
98*9880d681SAndroid Build Coastguard Worker     /// Return the register (virtual or physical) that will remain
99*9880d681SAndroid Build Coastguard Worker     /// after coalescing.
getDstReg()100*9880d681SAndroid Build Coastguard Worker     unsigned getDstReg() const { return DstReg; }
101*9880d681SAndroid Build Coastguard Worker 
102*9880d681SAndroid Build Coastguard Worker     /// Return the virtual register that will be coalesced away.
getSrcReg()103*9880d681SAndroid Build Coastguard Worker     unsigned getSrcReg() const { return SrcReg; }
104*9880d681SAndroid Build Coastguard Worker 
105*9880d681SAndroid Build Coastguard Worker     /// Return the subregister index that DstReg will be coalesced into, or 0.
getDstIdx()106*9880d681SAndroid Build Coastguard Worker     unsigned getDstIdx() const { return DstIdx; }
107*9880d681SAndroid Build Coastguard Worker 
108*9880d681SAndroid Build Coastguard Worker     /// Return the subregister index that SrcReg will be coalesced into, or 0.
getSrcIdx()109*9880d681SAndroid Build Coastguard Worker     unsigned getSrcIdx() const { return SrcIdx; }
110*9880d681SAndroid Build Coastguard Worker 
111*9880d681SAndroid Build Coastguard Worker     /// Return the register class of the coalesced register.
getNewRC()112*9880d681SAndroid Build Coastguard Worker     const TargetRegisterClass *getNewRC() const { return NewRC; }
113*9880d681SAndroid Build Coastguard Worker   };
114*9880d681SAndroid Build Coastguard Worker } // End llvm namespace
115*9880d681SAndroid Build Coastguard Worker 
116*9880d681SAndroid Build Coastguard Worker #endif
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