xref: /aosp_15_r20/external/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker //===- llvm/CodeGen/GlobalISel/RegisterBankInfo.cpp --------------*- C++ -*-==//
2*9880d681SAndroid Build Coastguard Worker //
3*9880d681SAndroid Build Coastguard Worker //                     The LLVM Compiler Infrastructure
4*9880d681SAndroid Build Coastguard Worker //
5*9880d681SAndroid Build Coastguard Worker // This file is distributed under the University of Illinois Open Source
6*9880d681SAndroid Build Coastguard Worker // License. See LICENSE.TXT for details.
7*9880d681SAndroid Build Coastguard Worker //
8*9880d681SAndroid Build Coastguard Worker //===----------------------------------------------------------------------===//
9*9880d681SAndroid Build Coastguard Worker /// \file
10*9880d681SAndroid Build Coastguard Worker /// This file implements the RegisterBankInfo class.
11*9880d681SAndroid Build Coastguard Worker //===----------------------------------------------------------------------===//
12*9880d681SAndroid Build Coastguard Worker 
13*9880d681SAndroid Build Coastguard Worker #include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h"
14*9880d681SAndroid Build Coastguard Worker #include "llvm/ADT/SmallString.h"
15*9880d681SAndroid Build Coastguard Worker #include "llvm/ADT/SmallVector.h"
16*9880d681SAndroid Build Coastguard Worker #include "llvm/ADT/iterator_range.h"
17*9880d681SAndroid Build Coastguard Worker #include "llvm/CodeGen/GlobalISel/RegisterBank.h"
18*9880d681SAndroid Build Coastguard Worker #include "llvm/CodeGen/MachineBasicBlock.h"
19*9880d681SAndroid Build Coastguard Worker #include "llvm/CodeGen/MachineFunction.h"
20*9880d681SAndroid Build Coastguard Worker #include "llvm/CodeGen/MachineRegisterInfo.h"
21*9880d681SAndroid Build Coastguard Worker #include "llvm/IR/Type.h"
22*9880d681SAndroid Build Coastguard Worker #include "llvm/Support/Debug.h"
23*9880d681SAndroid Build Coastguard Worker #include "llvm/Support/raw_ostream.h"
24*9880d681SAndroid Build Coastguard Worker #include "llvm/Target/TargetInstrInfo.h"
25*9880d681SAndroid Build Coastguard Worker #include "llvm/Target/TargetOpcodes.h"
26*9880d681SAndroid Build Coastguard Worker #include "llvm/Target/TargetRegisterInfo.h"
27*9880d681SAndroid Build Coastguard Worker #include "llvm/Target/TargetSubtargetInfo.h"
28*9880d681SAndroid Build Coastguard Worker 
29*9880d681SAndroid Build Coastguard Worker #include <algorithm> // For std::max.
30*9880d681SAndroid Build Coastguard Worker 
31*9880d681SAndroid Build Coastguard Worker #define DEBUG_TYPE "registerbankinfo"
32*9880d681SAndroid Build Coastguard Worker 
33*9880d681SAndroid Build Coastguard Worker using namespace llvm;
34*9880d681SAndroid Build Coastguard Worker 
35*9880d681SAndroid Build Coastguard Worker const unsigned RegisterBankInfo::DefaultMappingID = UINT_MAX;
36*9880d681SAndroid Build Coastguard Worker const unsigned RegisterBankInfo::InvalidMappingID = UINT_MAX - 1;
37*9880d681SAndroid Build Coastguard Worker 
38*9880d681SAndroid Build Coastguard Worker //------------------------------------------------------------------------------
39*9880d681SAndroid Build Coastguard Worker // RegisterBankInfo implementation.
40*9880d681SAndroid Build Coastguard Worker //------------------------------------------------------------------------------
RegisterBankInfo(unsigned NumRegBanks)41*9880d681SAndroid Build Coastguard Worker RegisterBankInfo::RegisterBankInfo(unsigned NumRegBanks)
42*9880d681SAndroid Build Coastguard Worker     : NumRegBanks(NumRegBanks) {
43*9880d681SAndroid Build Coastguard Worker   RegBanks.reset(new RegisterBank[NumRegBanks]);
44*9880d681SAndroid Build Coastguard Worker }
45*9880d681SAndroid Build Coastguard Worker 
verify(const TargetRegisterInfo & TRI) const46*9880d681SAndroid Build Coastguard Worker bool RegisterBankInfo::verify(const TargetRegisterInfo &TRI) const {
47*9880d681SAndroid Build Coastguard Worker   DEBUG(for (unsigned Idx = 0, End = getNumRegBanks(); Idx != End; ++Idx) {
48*9880d681SAndroid Build Coastguard Worker     const RegisterBank &RegBank = getRegBank(Idx);
49*9880d681SAndroid Build Coastguard Worker     assert(Idx == RegBank.getID() &&
50*9880d681SAndroid Build Coastguard Worker            "ID does not match the index in the array");
51*9880d681SAndroid Build Coastguard Worker     dbgs() << "Verify " << RegBank << '\n';
52*9880d681SAndroid Build Coastguard Worker     assert(RegBank.verify(TRI) && "RegBank is invalid");
53*9880d681SAndroid Build Coastguard Worker   });
54*9880d681SAndroid Build Coastguard Worker   return true;
55*9880d681SAndroid Build Coastguard Worker }
56*9880d681SAndroid Build Coastguard Worker 
createRegisterBank(unsigned ID,const char * Name)57*9880d681SAndroid Build Coastguard Worker void RegisterBankInfo::createRegisterBank(unsigned ID, const char *Name) {
58*9880d681SAndroid Build Coastguard Worker   DEBUG(dbgs() << "Create register bank: " << ID << " with name \"" << Name
59*9880d681SAndroid Build Coastguard Worker                << "\"\n");
60*9880d681SAndroid Build Coastguard Worker   RegisterBank &RegBank = getRegBank(ID);
61*9880d681SAndroid Build Coastguard Worker   assert(RegBank.getID() == RegisterBank::InvalidID &&
62*9880d681SAndroid Build Coastguard Worker          "A register bank should be created only once");
63*9880d681SAndroid Build Coastguard Worker   RegBank.ID = ID;
64*9880d681SAndroid Build Coastguard Worker   RegBank.Name = Name;
65*9880d681SAndroid Build Coastguard Worker }
66*9880d681SAndroid Build Coastguard Worker 
addRegBankCoverage(unsigned ID,unsigned RCId,const TargetRegisterInfo & TRI,bool AddTypeMapping)67*9880d681SAndroid Build Coastguard Worker void RegisterBankInfo::addRegBankCoverage(unsigned ID, unsigned RCId,
68*9880d681SAndroid Build Coastguard Worker                                           const TargetRegisterInfo &TRI,
69*9880d681SAndroid Build Coastguard Worker                                           bool AddTypeMapping) {
70*9880d681SAndroid Build Coastguard Worker   RegisterBank &RB = getRegBank(ID);
71*9880d681SAndroid Build Coastguard Worker   unsigned NbOfRegClasses = TRI.getNumRegClasses();
72*9880d681SAndroid Build Coastguard Worker 
73*9880d681SAndroid Build Coastguard Worker   DEBUG(dbgs() << "Add coverage for: " << RB << '\n');
74*9880d681SAndroid Build Coastguard Worker 
75*9880d681SAndroid Build Coastguard Worker   // Check if RB is underconstruction.
76*9880d681SAndroid Build Coastguard Worker   if (!RB.isValid())
77*9880d681SAndroid Build Coastguard Worker     RB.ContainedRegClasses.resize(NbOfRegClasses);
78*9880d681SAndroid Build Coastguard Worker   else if (RB.covers(*TRI.getRegClass(RCId)))
79*9880d681SAndroid Build Coastguard Worker     // If RB already covers this register class, there is nothing
80*9880d681SAndroid Build Coastguard Worker     // to do.
81*9880d681SAndroid Build Coastguard Worker     return;
82*9880d681SAndroid Build Coastguard Worker 
83*9880d681SAndroid Build Coastguard Worker   BitVector &Covered = RB.ContainedRegClasses;
84*9880d681SAndroid Build Coastguard Worker   SmallVector<unsigned, 8> WorkList;
85*9880d681SAndroid Build Coastguard Worker 
86*9880d681SAndroid Build Coastguard Worker   WorkList.push_back(RCId);
87*9880d681SAndroid Build Coastguard Worker   Covered.set(RCId);
88*9880d681SAndroid Build Coastguard Worker 
89*9880d681SAndroid Build Coastguard Worker   unsigned &MaxSize = RB.Size;
90*9880d681SAndroid Build Coastguard Worker   do {
91*9880d681SAndroid Build Coastguard Worker     unsigned RCId = WorkList.pop_back_val();
92*9880d681SAndroid Build Coastguard Worker 
93*9880d681SAndroid Build Coastguard Worker     const TargetRegisterClass &CurRC = *TRI.getRegClass(RCId);
94*9880d681SAndroid Build Coastguard Worker 
95*9880d681SAndroid Build Coastguard Worker     DEBUG(dbgs() << "Examine: " << TRI.getRegClassName(&CurRC)
96*9880d681SAndroid Build Coastguard Worker                  << "(Size*8: " << (CurRC.getSize() * 8) << ")\n");
97*9880d681SAndroid Build Coastguard Worker 
98*9880d681SAndroid Build Coastguard Worker     // Remember the biggest size in bits.
99*9880d681SAndroid Build Coastguard Worker     MaxSize = std::max(MaxSize, CurRC.getSize() * 8);
100*9880d681SAndroid Build Coastguard Worker 
101*9880d681SAndroid Build Coastguard Worker     // If we have been asked to record the type supported by this
102*9880d681SAndroid Build Coastguard Worker     // register bank, do it now.
103*9880d681SAndroid Build Coastguard Worker     if (AddTypeMapping)
104*9880d681SAndroid Build Coastguard Worker       for (MVT::SimpleValueType SVT :
105*9880d681SAndroid Build Coastguard Worker            make_range(CurRC.vt_begin(), CurRC.vt_end()))
106*9880d681SAndroid Build Coastguard Worker         recordRegBankForType(getRegBank(ID), SVT);
107*9880d681SAndroid Build Coastguard Worker 
108*9880d681SAndroid Build Coastguard Worker     // Walk through all sub register classes and push them into the worklist.
109*9880d681SAndroid Build Coastguard Worker     bool First = true;
110*9880d681SAndroid Build Coastguard Worker     for (BitMaskClassIterator It(CurRC.getSubClassMask(), TRI); It.isValid();
111*9880d681SAndroid Build Coastguard Worker          ++It) {
112*9880d681SAndroid Build Coastguard Worker       unsigned SubRCId = It.getID();
113*9880d681SAndroid Build Coastguard Worker       if (!Covered.test(SubRCId)) {
114*9880d681SAndroid Build Coastguard Worker         if (First)
115*9880d681SAndroid Build Coastguard Worker           DEBUG(dbgs() << "  Enqueue sub-class: ");
116*9880d681SAndroid Build Coastguard Worker         DEBUG(dbgs() << TRI.getRegClassName(TRI.getRegClass(SubRCId)) << ", ");
117*9880d681SAndroid Build Coastguard Worker         WorkList.push_back(SubRCId);
118*9880d681SAndroid Build Coastguard Worker         // Remember that we saw the sub class.
119*9880d681SAndroid Build Coastguard Worker         Covered.set(SubRCId);
120*9880d681SAndroid Build Coastguard Worker         First = false;
121*9880d681SAndroid Build Coastguard Worker       }
122*9880d681SAndroid Build Coastguard Worker     }
123*9880d681SAndroid Build Coastguard Worker     if (!First)
124*9880d681SAndroid Build Coastguard Worker       DEBUG(dbgs() << '\n');
125*9880d681SAndroid Build Coastguard Worker 
126*9880d681SAndroid Build Coastguard Worker     // Push also all the register classes that can be accessed via a
127*9880d681SAndroid Build Coastguard Worker     // subreg index, i.e., its subreg-class (which is different than
128*9880d681SAndroid Build Coastguard Worker     // its subclass).
129*9880d681SAndroid Build Coastguard Worker     //
130*9880d681SAndroid Build Coastguard Worker     // Note: It would probably be faster to go the other way around
131*9880d681SAndroid Build Coastguard Worker     // and have this method add only super classes, since this
132*9880d681SAndroid Build Coastguard Worker     // information is available in a more efficient way. However, it
133*9880d681SAndroid Build Coastguard Worker     // feels less natural for the client of this APIs plus we will
134*9880d681SAndroid Build Coastguard Worker     // TableGen the whole bitset at some point, so compile time for
135*9880d681SAndroid Build Coastguard Worker     // the initialization is not very important.
136*9880d681SAndroid Build Coastguard Worker     First = true;
137*9880d681SAndroid Build Coastguard Worker     for (unsigned SubRCId = 0; SubRCId < NbOfRegClasses; ++SubRCId) {
138*9880d681SAndroid Build Coastguard Worker       if (Covered.test(SubRCId))
139*9880d681SAndroid Build Coastguard Worker         continue;
140*9880d681SAndroid Build Coastguard Worker       bool Pushed = false;
141*9880d681SAndroid Build Coastguard Worker       const TargetRegisterClass *SubRC = TRI.getRegClass(SubRCId);
142*9880d681SAndroid Build Coastguard Worker       for (SuperRegClassIterator SuperRCIt(SubRC, &TRI); SuperRCIt.isValid();
143*9880d681SAndroid Build Coastguard Worker            ++SuperRCIt) {
144*9880d681SAndroid Build Coastguard Worker         if (Pushed)
145*9880d681SAndroid Build Coastguard Worker           break;
146*9880d681SAndroid Build Coastguard Worker         for (BitMaskClassIterator It(SuperRCIt.getMask(), TRI); It.isValid();
147*9880d681SAndroid Build Coastguard Worker              ++It) {
148*9880d681SAndroid Build Coastguard Worker           unsigned SuperRCId = It.getID();
149*9880d681SAndroid Build Coastguard Worker           if (SuperRCId == RCId) {
150*9880d681SAndroid Build Coastguard Worker             if (First)
151*9880d681SAndroid Build Coastguard Worker               DEBUG(dbgs() << "  Enqueue subreg-class: ");
152*9880d681SAndroid Build Coastguard Worker             DEBUG(dbgs() << TRI.getRegClassName(SubRC) << ", ");
153*9880d681SAndroid Build Coastguard Worker             WorkList.push_back(SubRCId);
154*9880d681SAndroid Build Coastguard Worker             // Remember that we saw the sub class.
155*9880d681SAndroid Build Coastguard Worker             Covered.set(SubRCId);
156*9880d681SAndroid Build Coastguard Worker             Pushed = true;
157*9880d681SAndroid Build Coastguard Worker             First = false;
158*9880d681SAndroid Build Coastguard Worker             break;
159*9880d681SAndroid Build Coastguard Worker           }
160*9880d681SAndroid Build Coastguard Worker         }
161*9880d681SAndroid Build Coastguard Worker       }
162*9880d681SAndroid Build Coastguard Worker     }
163*9880d681SAndroid Build Coastguard Worker     if (!First)
164*9880d681SAndroid Build Coastguard Worker       DEBUG(dbgs() << '\n');
165*9880d681SAndroid Build Coastguard Worker   } while (!WorkList.empty());
166*9880d681SAndroid Build Coastguard Worker }
167*9880d681SAndroid Build Coastguard Worker 
168*9880d681SAndroid Build Coastguard Worker const RegisterBank *
getRegBank(unsigned Reg,const MachineRegisterInfo & MRI,const TargetRegisterInfo & TRI) const169*9880d681SAndroid Build Coastguard Worker RegisterBankInfo::getRegBank(unsigned Reg, const MachineRegisterInfo &MRI,
170*9880d681SAndroid Build Coastguard Worker                              const TargetRegisterInfo &TRI) const {
171*9880d681SAndroid Build Coastguard Worker   if (TargetRegisterInfo::isPhysicalRegister(Reg))
172*9880d681SAndroid Build Coastguard Worker     return &getRegBankFromRegClass(*TRI.getMinimalPhysRegClass(Reg));
173*9880d681SAndroid Build Coastguard Worker 
174*9880d681SAndroid Build Coastguard Worker   assert(Reg && "NoRegister does not have a register bank");
175*9880d681SAndroid Build Coastguard Worker   const RegClassOrRegBank &RegClassOrBank = MRI.getRegClassOrRegBank(Reg);
176*9880d681SAndroid Build Coastguard Worker   if (RegClassOrBank.is<const RegisterBank *>())
177*9880d681SAndroid Build Coastguard Worker     return RegClassOrBank.get<const RegisterBank *>();
178*9880d681SAndroid Build Coastguard Worker   const TargetRegisterClass *RC =
179*9880d681SAndroid Build Coastguard Worker       RegClassOrBank.get<const TargetRegisterClass *>();
180*9880d681SAndroid Build Coastguard Worker   if (RC)
181*9880d681SAndroid Build Coastguard Worker     return &getRegBankFromRegClass(*RC);
182*9880d681SAndroid Build Coastguard Worker   return nullptr;
183*9880d681SAndroid Build Coastguard Worker }
184*9880d681SAndroid Build Coastguard Worker 
getRegBankFromConstraints(const MachineInstr & MI,unsigned OpIdx,const TargetInstrInfo & TII,const TargetRegisterInfo & TRI) const185*9880d681SAndroid Build Coastguard Worker const RegisterBank *RegisterBankInfo::getRegBankFromConstraints(
186*9880d681SAndroid Build Coastguard Worker     const MachineInstr &MI, unsigned OpIdx, const TargetInstrInfo &TII,
187*9880d681SAndroid Build Coastguard Worker     const TargetRegisterInfo &TRI) const {
188*9880d681SAndroid Build Coastguard Worker   // The mapping of the registers may be available via the
189*9880d681SAndroid Build Coastguard Worker   // register class constraints.
190*9880d681SAndroid Build Coastguard Worker   const TargetRegisterClass *RC = MI.getRegClassConstraint(OpIdx, &TII, &TRI);
191*9880d681SAndroid Build Coastguard Worker 
192*9880d681SAndroid Build Coastguard Worker   if (!RC)
193*9880d681SAndroid Build Coastguard Worker     return nullptr;
194*9880d681SAndroid Build Coastguard Worker 
195*9880d681SAndroid Build Coastguard Worker   const RegisterBank &RegBank = getRegBankFromRegClass(*RC);
196*9880d681SAndroid Build Coastguard Worker   // Sanity check that the target properly implemented getRegBankFromRegClass.
197*9880d681SAndroid Build Coastguard Worker   assert(RegBank.covers(*RC) &&
198*9880d681SAndroid Build Coastguard Worker          "The mapping of the register bank does not make sense");
199*9880d681SAndroid Build Coastguard Worker   return &RegBank;
200*9880d681SAndroid Build Coastguard Worker }
201*9880d681SAndroid Build Coastguard Worker 
202*9880d681SAndroid Build Coastguard Worker RegisterBankInfo::InstructionMapping
getInstrMappingImpl(const MachineInstr & MI) const203*9880d681SAndroid Build Coastguard Worker RegisterBankInfo::getInstrMappingImpl(const MachineInstr &MI) const {
204*9880d681SAndroid Build Coastguard Worker   RegisterBankInfo::InstructionMapping Mapping(DefaultMappingID, /*Cost*/ 1,
205*9880d681SAndroid Build Coastguard Worker                                                MI.getNumOperands());
206*9880d681SAndroid Build Coastguard Worker   const MachineFunction &MF = *MI.getParent()->getParent();
207*9880d681SAndroid Build Coastguard Worker   const TargetSubtargetInfo &STI = MF.getSubtarget();
208*9880d681SAndroid Build Coastguard Worker   const TargetRegisterInfo &TRI = *STI.getRegisterInfo();
209*9880d681SAndroid Build Coastguard Worker   const MachineRegisterInfo &MRI = MF.getRegInfo();
210*9880d681SAndroid Build Coastguard Worker   // We may need to query the instruction encoding to guess the mapping.
211*9880d681SAndroid Build Coastguard Worker   const TargetInstrInfo &TII = *STI.getInstrInfo();
212*9880d681SAndroid Build Coastguard Worker 
213*9880d681SAndroid Build Coastguard Worker   // Before doing anything complicated check if the mapping is not
214*9880d681SAndroid Build Coastguard Worker   // directly available.
215*9880d681SAndroid Build Coastguard Worker   bool CompleteMapping = true;
216*9880d681SAndroid Build Coastguard Worker   // For copies we want to walk over the operands and try to find one
217*9880d681SAndroid Build Coastguard Worker   // that has a register bank.
218*9880d681SAndroid Build Coastguard Worker   bool isCopyLike = MI.isCopy() || MI.isPHI();
219*9880d681SAndroid Build Coastguard Worker   // Remember the register bank for reuse for copy-like instructions.
220*9880d681SAndroid Build Coastguard Worker   const RegisterBank *RegBank = nullptr;
221*9880d681SAndroid Build Coastguard Worker   // Remember the size of the register for reuse for copy-like instructions.
222*9880d681SAndroid Build Coastguard Worker   unsigned RegSize = 0;
223*9880d681SAndroid Build Coastguard Worker   for (unsigned OpIdx = 0, End = MI.getNumOperands(); OpIdx != End; ++OpIdx) {
224*9880d681SAndroid Build Coastguard Worker     const MachineOperand &MO = MI.getOperand(OpIdx);
225*9880d681SAndroid Build Coastguard Worker     if (!MO.isReg())
226*9880d681SAndroid Build Coastguard Worker       continue;
227*9880d681SAndroid Build Coastguard Worker     unsigned Reg = MO.getReg();
228*9880d681SAndroid Build Coastguard Worker     if (!Reg)
229*9880d681SAndroid Build Coastguard Worker       continue;
230*9880d681SAndroid Build Coastguard Worker     // The register bank of Reg is just a side effect of the current
231*9880d681SAndroid Build Coastguard Worker     // excution and in particular, there is no reason to believe this
232*9880d681SAndroid Build Coastguard Worker     // is the best default mapping for the current instruction.  Keep
233*9880d681SAndroid Build Coastguard Worker     // it as an alternative register bank if we cannot figure out
234*9880d681SAndroid Build Coastguard Worker     // something.
235*9880d681SAndroid Build Coastguard Worker     const RegisterBank *AltRegBank = getRegBank(Reg, MRI, TRI);
236*9880d681SAndroid Build Coastguard Worker     // For copy-like instruction, we want to reuse the register bank
237*9880d681SAndroid Build Coastguard Worker     // that is already set on Reg, if any, since those instructions do
238*9880d681SAndroid Build Coastguard Worker     // not have any constraints.
239*9880d681SAndroid Build Coastguard Worker     const RegisterBank *CurRegBank = isCopyLike ? AltRegBank : nullptr;
240*9880d681SAndroid Build Coastguard Worker     if (!CurRegBank) {
241*9880d681SAndroid Build Coastguard Worker       // If this is a target specific instruction, we can deduce
242*9880d681SAndroid Build Coastguard Worker       // the register bank from the encoding constraints.
243*9880d681SAndroid Build Coastguard Worker       CurRegBank = getRegBankFromConstraints(MI, OpIdx, TII, TRI);
244*9880d681SAndroid Build Coastguard Worker       if (!CurRegBank) {
245*9880d681SAndroid Build Coastguard Worker         // Check if we can deduce the register bank from the type of
246*9880d681SAndroid Build Coastguard Worker         // the instruction.
247*9880d681SAndroid Build Coastguard Worker         Type *MITy = MI.getType();
248*9880d681SAndroid Build Coastguard Worker         if (MITy)
249*9880d681SAndroid Build Coastguard Worker           CurRegBank = getRegBankForType(
250*9880d681SAndroid Build Coastguard Worker               MVT::getVT(MITy, /*HandleUnknown*/ true).SimpleTy);
251*9880d681SAndroid Build Coastguard Worker         if (!CurRegBank)
252*9880d681SAndroid Build Coastguard Worker           // Use the current assigned register bank.
253*9880d681SAndroid Build Coastguard Worker           // That may not make much sense though.
254*9880d681SAndroid Build Coastguard Worker           CurRegBank = AltRegBank;
255*9880d681SAndroid Build Coastguard Worker         if (!CurRegBank) {
256*9880d681SAndroid Build Coastguard Worker           // All our attempts failed, give up.
257*9880d681SAndroid Build Coastguard Worker           CompleteMapping = false;
258*9880d681SAndroid Build Coastguard Worker 
259*9880d681SAndroid Build Coastguard Worker           if (!isCopyLike)
260*9880d681SAndroid Build Coastguard Worker             // MI does not carry enough information to guess the mapping.
261*9880d681SAndroid Build Coastguard Worker             return InstructionMapping();
262*9880d681SAndroid Build Coastguard Worker 
263*9880d681SAndroid Build Coastguard Worker           // For copies, we want to keep interating to find a register
264*9880d681SAndroid Build Coastguard Worker           // bank for the other operands if we did not find one yet.
265*9880d681SAndroid Build Coastguard Worker           if (RegBank)
266*9880d681SAndroid Build Coastguard Worker             break;
267*9880d681SAndroid Build Coastguard Worker           continue;
268*9880d681SAndroid Build Coastguard Worker         }
269*9880d681SAndroid Build Coastguard Worker       }
270*9880d681SAndroid Build Coastguard Worker     }
271*9880d681SAndroid Build Coastguard Worker     RegBank = CurRegBank;
272*9880d681SAndroid Build Coastguard Worker     RegSize = getSizeInBits(Reg, MRI, TRI);
273*9880d681SAndroid Build Coastguard Worker     Mapping.setOperandMapping(OpIdx, RegSize, *CurRegBank);
274*9880d681SAndroid Build Coastguard Worker   }
275*9880d681SAndroid Build Coastguard Worker 
276*9880d681SAndroid Build Coastguard Worker   if (CompleteMapping)
277*9880d681SAndroid Build Coastguard Worker     return Mapping;
278*9880d681SAndroid Build Coastguard Worker 
279*9880d681SAndroid Build Coastguard Worker   assert(isCopyLike && "We should have bailed on non-copies at this point");
280*9880d681SAndroid Build Coastguard Worker   // For copy like instruction, if none of the operand has a register
281*9880d681SAndroid Build Coastguard Worker   // bank avialable, there is nothing we can propagate.
282*9880d681SAndroid Build Coastguard Worker   if (!RegBank)
283*9880d681SAndroid Build Coastguard Worker     return InstructionMapping();
284*9880d681SAndroid Build Coastguard Worker 
285*9880d681SAndroid Build Coastguard Worker   // This is a copy-like instruction.
286*9880d681SAndroid Build Coastguard Worker   // Propagate RegBank to all operands that do not have a
287*9880d681SAndroid Build Coastguard Worker   // mapping yet.
288*9880d681SAndroid Build Coastguard Worker   for (unsigned OpIdx = 0, End = MI.getNumOperands(); OpIdx != End; ++OpIdx) {
289*9880d681SAndroid Build Coastguard Worker     const MachineOperand &MO = MI.getOperand(OpIdx);
290*9880d681SAndroid Build Coastguard Worker     // Don't assign a mapping for non-reg operands.
291*9880d681SAndroid Build Coastguard Worker     if (!MO.isReg())
292*9880d681SAndroid Build Coastguard Worker       continue;
293*9880d681SAndroid Build Coastguard Worker 
294*9880d681SAndroid Build Coastguard Worker     // If a mapping already exists, do not touch it.
295*9880d681SAndroid Build Coastguard Worker     if (!static_cast<const InstructionMapping *>(&Mapping)
296*9880d681SAndroid Build Coastguard Worker              ->getOperandMapping(OpIdx)
297*9880d681SAndroid Build Coastguard Worker              .BreakDown.empty())
298*9880d681SAndroid Build Coastguard Worker       continue;
299*9880d681SAndroid Build Coastguard Worker 
300*9880d681SAndroid Build Coastguard Worker     Mapping.setOperandMapping(OpIdx, RegSize, *RegBank);
301*9880d681SAndroid Build Coastguard Worker   }
302*9880d681SAndroid Build Coastguard Worker   return Mapping;
303*9880d681SAndroid Build Coastguard Worker }
304*9880d681SAndroid Build Coastguard Worker 
305*9880d681SAndroid Build Coastguard Worker RegisterBankInfo::InstructionMapping
getInstrMapping(const MachineInstr & MI) const306*9880d681SAndroid Build Coastguard Worker RegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
307*9880d681SAndroid Build Coastguard Worker     RegisterBankInfo::InstructionMapping Mapping = getInstrMappingImpl(MI);
308*9880d681SAndroid Build Coastguard Worker     if (Mapping.isValid())
309*9880d681SAndroid Build Coastguard Worker       return Mapping;
310*9880d681SAndroid Build Coastguard Worker   llvm_unreachable("The target must implement this");
311*9880d681SAndroid Build Coastguard Worker }
312*9880d681SAndroid Build Coastguard Worker 
313*9880d681SAndroid Build Coastguard Worker RegisterBankInfo::InstructionMappings
getInstrPossibleMappings(const MachineInstr & MI) const314*9880d681SAndroid Build Coastguard Worker RegisterBankInfo::getInstrPossibleMappings(const MachineInstr &MI) const {
315*9880d681SAndroid Build Coastguard Worker   InstructionMappings PossibleMappings;
316*9880d681SAndroid Build Coastguard Worker   // Put the default mapping first.
317*9880d681SAndroid Build Coastguard Worker   PossibleMappings.push_back(getInstrMapping(MI));
318*9880d681SAndroid Build Coastguard Worker   // Then the alternative mapping, if any.
319*9880d681SAndroid Build Coastguard Worker   InstructionMappings AltMappings = getInstrAlternativeMappings(MI);
320*9880d681SAndroid Build Coastguard Worker   for (InstructionMapping &AltMapping : AltMappings)
321*9880d681SAndroid Build Coastguard Worker     PossibleMappings.emplace_back(std::move(AltMapping));
322*9880d681SAndroid Build Coastguard Worker #ifndef NDEBUG
323*9880d681SAndroid Build Coastguard Worker   for (const InstructionMapping &Mapping : PossibleMappings)
324*9880d681SAndroid Build Coastguard Worker     assert(Mapping.verify(MI) && "Mapping is invalid");
325*9880d681SAndroid Build Coastguard Worker #endif
326*9880d681SAndroid Build Coastguard Worker   return PossibleMappings;
327*9880d681SAndroid Build Coastguard Worker }
328*9880d681SAndroid Build Coastguard Worker 
329*9880d681SAndroid Build Coastguard Worker RegisterBankInfo::InstructionMappings
getInstrAlternativeMappings(const MachineInstr & MI) const330*9880d681SAndroid Build Coastguard Worker RegisterBankInfo::getInstrAlternativeMappings(const MachineInstr &MI) const {
331*9880d681SAndroid Build Coastguard Worker   // No alternative for MI.
332*9880d681SAndroid Build Coastguard Worker   return InstructionMappings();
333*9880d681SAndroid Build Coastguard Worker }
334*9880d681SAndroid Build Coastguard Worker 
applyDefaultMapping(const OperandsMapper & OpdMapper)335*9880d681SAndroid Build Coastguard Worker void RegisterBankInfo::applyDefaultMapping(const OperandsMapper &OpdMapper) {
336*9880d681SAndroid Build Coastguard Worker   MachineInstr &MI = OpdMapper.getMI();
337*9880d681SAndroid Build Coastguard Worker   DEBUG(dbgs() << "Applying default-like mapping\n");
338*9880d681SAndroid Build Coastguard Worker   for (unsigned OpIdx = 0, EndIdx = MI.getNumOperands(); OpIdx != EndIdx;
339*9880d681SAndroid Build Coastguard Worker        ++OpIdx) {
340*9880d681SAndroid Build Coastguard Worker     DEBUG(dbgs() << "OpIdx " << OpIdx);
341*9880d681SAndroid Build Coastguard Worker     MachineOperand &MO = MI.getOperand(OpIdx);
342*9880d681SAndroid Build Coastguard Worker     if (!MO.isReg()) {
343*9880d681SAndroid Build Coastguard Worker       DEBUG(dbgs() << " is not a register, nothing to be done\n");
344*9880d681SAndroid Build Coastguard Worker       continue;
345*9880d681SAndroid Build Coastguard Worker     }
346*9880d681SAndroid Build Coastguard Worker     assert(
347*9880d681SAndroid Build Coastguard Worker         OpdMapper.getInstrMapping().getOperandMapping(OpIdx).BreakDown.size() ==
348*9880d681SAndroid Build Coastguard Worker             1 &&
349*9880d681SAndroid Build Coastguard Worker         "This mapping is too complex for this function");
350*9880d681SAndroid Build Coastguard Worker     iterator_range<SmallVectorImpl<unsigned>::const_iterator> NewRegs =
351*9880d681SAndroid Build Coastguard Worker         OpdMapper.getVRegs(OpIdx);
352*9880d681SAndroid Build Coastguard Worker     if (NewRegs.begin() == NewRegs.end()) {
353*9880d681SAndroid Build Coastguard Worker       DEBUG(dbgs() << " has not been repaired, nothing to be done\n");
354*9880d681SAndroid Build Coastguard Worker       continue;
355*9880d681SAndroid Build Coastguard Worker     }
356*9880d681SAndroid Build Coastguard Worker     DEBUG(dbgs() << " changed, replace " << MO.getReg());
357*9880d681SAndroid Build Coastguard Worker     MO.setReg(*NewRegs.begin());
358*9880d681SAndroid Build Coastguard Worker     DEBUG(dbgs() << " with " << MO.getReg());
359*9880d681SAndroid Build Coastguard Worker   }
360*9880d681SAndroid Build Coastguard Worker }
361*9880d681SAndroid Build Coastguard Worker 
getSizeInBits(unsigned Reg,const MachineRegisterInfo & MRI,const TargetRegisterInfo & TRI)362*9880d681SAndroid Build Coastguard Worker unsigned RegisterBankInfo::getSizeInBits(unsigned Reg,
363*9880d681SAndroid Build Coastguard Worker                                          const MachineRegisterInfo &MRI,
364*9880d681SAndroid Build Coastguard Worker                                          const TargetRegisterInfo &TRI) {
365*9880d681SAndroid Build Coastguard Worker   const TargetRegisterClass *RC = nullptr;
366*9880d681SAndroid Build Coastguard Worker   if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
367*9880d681SAndroid Build Coastguard Worker     // The size is not directly available for physical registers.
368*9880d681SAndroid Build Coastguard Worker     // Instead, we need to access a register class that contains Reg and
369*9880d681SAndroid Build Coastguard Worker     // get the size of that register class.
370*9880d681SAndroid Build Coastguard Worker     RC = TRI.getMinimalPhysRegClass(Reg);
371*9880d681SAndroid Build Coastguard Worker   } else {
372*9880d681SAndroid Build Coastguard Worker     unsigned RegSize = MRI.getSize(Reg);
373*9880d681SAndroid Build Coastguard Worker     // If Reg is not a generic register, query the register class to
374*9880d681SAndroid Build Coastguard Worker     // get its size.
375*9880d681SAndroid Build Coastguard Worker     if (RegSize)
376*9880d681SAndroid Build Coastguard Worker       return RegSize;
377*9880d681SAndroid Build Coastguard Worker     // Since Reg is not a generic register, it must have a register class.
378*9880d681SAndroid Build Coastguard Worker     RC = MRI.getRegClass(Reg);
379*9880d681SAndroid Build Coastguard Worker   }
380*9880d681SAndroid Build Coastguard Worker   assert(RC && "Unable to deduce the register class");
381*9880d681SAndroid Build Coastguard Worker   return RC->getSize() * 8;
382*9880d681SAndroid Build Coastguard Worker }
383*9880d681SAndroid Build Coastguard Worker 
384*9880d681SAndroid Build Coastguard Worker //------------------------------------------------------------------------------
385*9880d681SAndroid Build Coastguard Worker // Helper classes implementation.
386*9880d681SAndroid Build Coastguard Worker //------------------------------------------------------------------------------
dump() const387*9880d681SAndroid Build Coastguard Worker void RegisterBankInfo::PartialMapping::dump() const {
388*9880d681SAndroid Build Coastguard Worker   print(dbgs());
389*9880d681SAndroid Build Coastguard Worker   dbgs() << '\n';
390*9880d681SAndroid Build Coastguard Worker }
391*9880d681SAndroid Build Coastguard Worker 
verify() const392*9880d681SAndroid Build Coastguard Worker bool RegisterBankInfo::PartialMapping::verify() const {
393*9880d681SAndroid Build Coastguard Worker   assert(RegBank && "Register bank not set");
394*9880d681SAndroid Build Coastguard Worker   assert(Length && "Empty mapping");
395*9880d681SAndroid Build Coastguard Worker   assert((StartIdx < getHighBitIdx()) && "Overflow, switch to APInt?");
396*9880d681SAndroid Build Coastguard Worker   // Check if the minimum width fits into RegBank.
397*9880d681SAndroid Build Coastguard Worker   assert(RegBank->getSize() >= Length && "Register bank too small for Mask");
398*9880d681SAndroid Build Coastguard Worker   return true;
399*9880d681SAndroid Build Coastguard Worker }
400*9880d681SAndroid Build Coastguard Worker 
print(raw_ostream & OS) const401*9880d681SAndroid Build Coastguard Worker void RegisterBankInfo::PartialMapping::print(raw_ostream &OS) const {
402*9880d681SAndroid Build Coastguard Worker   OS << "[" << StartIdx << ", " << getHighBitIdx() << "], RegBank = ";
403*9880d681SAndroid Build Coastguard Worker   if (RegBank)
404*9880d681SAndroid Build Coastguard Worker     OS << *RegBank;
405*9880d681SAndroid Build Coastguard Worker   else
406*9880d681SAndroid Build Coastguard Worker     OS << "nullptr";
407*9880d681SAndroid Build Coastguard Worker }
408*9880d681SAndroid Build Coastguard Worker 
verify(unsigned ExpectedBitWidth) const409*9880d681SAndroid Build Coastguard Worker bool RegisterBankInfo::ValueMapping::verify(unsigned ExpectedBitWidth) const {
410*9880d681SAndroid Build Coastguard Worker   assert(!BreakDown.empty() && "Value mapped nowhere?!");
411*9880d681SAndroid Build Coastguard Worker   unsigned OrigValueBitWidth = 0;
412*9880d681SAndroid Build Coastguard Worker   for (const RegisterBankInfo::PartialMapping &PartMap : BreakDown) {
413*9880d681SAndroid Build Coastguard Worker     // Check that each register bank is big enough to hold the partial value:
414*9880d681SAndroid Build Coastguard Worker     // this check is done by PartialMapping::verify
415*9880d681SAndroid Build Coastguard Worker     assert(PartMap.verify() && "Partial mapping is invalid");
416*9880d681SAndroid Build Coastguard Worker     // The original value should completely be mapped.
417*9880d681SAndroid Build Coastguard Worker     // Thus the maximum accessed index + 1 is the size of the original value.
418*9880d681SAndroid Build Coastguard Worker     OrigValueBitWidth =
419*9880d681SAndroid Build Coastguard Worker         std::max(OrigValueBitWidth, PartMap.getHighBitIdx() + 1);
420*9880d681SAndroid Build Coastguard Worker   }
421*9880d681SAndroid Build Coastguard Worker   assert(OrigValueBitWidth == ExpectedBitWidth && "BitWidth does not match");
422*9880d681SAndroid Build Coastguard Worker   APInt ValueMask(OrigValueBitWidth, 0);
423*9880d681SAndroid Build Coastguard Worker   for (const RegisterBankInfo::PartialMapping &PartMap : BreakDown) {
424*9880d681SAndroid Build Coastguard Worker     // Check that the union of the partial mappings covers the whole value,
425*9880d681SAndroid Build Coastguard Worker     // without overlaps.
426*9880d681SAndroid Build Coastguard Worker     // The high bit is exclusive in the APInt API, thus getHighBitIdx + 1.
427*9880d681SAndroid Build Coastguard Worker     APInt PartMapMask = APInt::getBitsSet(OrigValueBitWidth, PartMap.StartIdx,
428*9880d681SAndroid Build Coastguard Worker                                           PartMap.getHighBitIdx() + 1);
429*9880d681SAndroid Build Coastguard Worker     ValueMask ^= PartMapMask;
430*9880d681SAndroid Build Coastguard Worker     assert((ValueMask & PartMapMask) == PartMapMask &&
431*9880d681SAndroid Build Coastguard Worker            "Some partial mappings overlap");
432*9880d681SAndroid Build Coastguard Worker   }
433*9880d681SAndroid Build Coastguard Worker   assert(ValueMask.isAllOnesValue() && "Value is not fully mapped");
434*9880d681SAndroid Build Coastguard Worker   return true;
435*9880d681SAndroid Build Coastguard Worker }
436*9880d681SAndroid Build Coastguard Worker 
dump() const437*9880d681SAndroid Build Coastguard Worker void RegisterBankInfo::ValueMapping::dump() const {
438*9880d681SAndroid Build Coastguard Worker   print(dbgs());
439*9880d681SAndroid Build Coastguard Worker   dbgs() << '\n';
440*9880d681SAndroid Build Coastguard Worker }
441*9880d681SAndroid Build Coastguard Worker 
print(raw_ostream & OS) const442*9880d681SAndroid Build Coastguard Worker void RegisterBankInfo::ValueMapping::print(raw_ostream &OS) const {
443*9880d681SAndroid Build Coastguard Worker   OS << "#BreakDown: " << BreakDown.size() << " ";
444*9880d681SAndroid Build Coastguard Worker   bool IsFirst = true;
445*9880d681SAndroid Build Coastguard Worker   for (const PartialMapping &PartMap : BreakDown) {
446*9880d681SAndroid Build Coastguard Worker     if (!IsFirst)
447*9880d681SAndroid Build Coastguard Worker       OS << ", ";
448*9880d681SAndroid Build Coastguard Worker     OS << '[' << PartMap << ']';
449*9880d681SAndroid Build Coastguard Worker     IsFirst = false;
450*9880d681SAndroid Build Coastguard Worker   }
451*9880d681SAndroid Build Coastguard Worker }
452*9880d681SAndroid Build Coastguard Worker 
setOperandMapping(unsigned OpIdx,unsigned MaskSize,const RegisterBank & RegBank)453*9880d681SAndroid Build Coastguard Worker void RegisterBankInfo::InstructionMapping::setOperandMapping(
454*9880d681SAndroid Build Coastguard Worker     unsigned OpIdx, unsigned MaskSize, const RegisterBank &RegBank) {
455*9880d681SAndroid Build Coastguard Worker   // Build the value mapping.
456*9880d681SAndroid Build Coastguard Worker   assert(MaskSize <= RegBank.getSize() && "Register bank is too small");
457*9880d681SAndroid Build Coastguard Worker 
458*9880d681SAndroid Build Coastguard Worker   // Create the mapping object.
459*9880d681SAndroid Build Coastguard Worker   getOperandMapping(OpIdx).BreakDown.push_back(
460*9880d681SAndroid Build Coastguard Worker       PartialMapping(0, MaskSize, RegBank));
461*9880d681SAndroid Build Coastguard Worker }
462*9880d681SAndroid Build Coastguard Worker 
verify(const MachineInstr & MI) const463*9880d681SAndroid Build Coastguard Worker bool RegisterBankInfo::InstructionMapping::verify(
464*9880d681SAndroid Build Coastguard Worker     const MachineInstr &MI) const {
465*9880d681SAndroid Build Coastguard Worker   // Check that all the register operands are properly mapped.
466*9880d681SAndroid Build Coastguard Worker   // Check the constructor invariant.
467*9880d681SAndroid Build Coastguard Worker   assert(NumOperands == MI.getNumOperands() &&
468*9880d681SAndroid Build Coastguard Worker          "NumOperands must match, see constructor");
469*9880d681SAndroid Build Coastguard Worker   assert(MI.getParent() && MI.getParent()->getParent() &&
470*9880d681SAndroid Build Coastguard Worker          "MI must be connected to a MachineFunction");
471*9880d681SAndroid Build Coastguard Worker   const MachineFunction &MF = *MI.getParent()->getParent();
472*9880d681SAndroid Build Coastguard Worker   (void)MF;
473*9880d681SAndroid Build Coastguard Worker 
474*9880d681SAndroid Build Coastguard Worker   for (unsigned Idx = 0; Idx < NumOperands; ++Idx) {
475*9880d681SAndroid Build Coastguard Worker     const MachineOperand &MO = MI.getOperand(Idx);
476*9880d681SAndroid Build Coastguard Worker     const RegisterBankInfo::ValueMapping &MOMapping = getOperandMapping(Idx);
477*9880d681SAndroid Build Coastguard Worker     (void)MOMapping;
478*9880d681SAndroid Build Coastguard Worker     if (!MO.isReg()) {
479*9880d681SAndroid Build Coastguard Worker       assert(MOMapping.BreakDown.empty() &&
480*9880d681SAndroid Build Coastguard Worker              "We should not care about non-reg mapping");
481*9880d681SAndroid Build Coastguard Worker       continue;
482*9880d681SAndroid Build Coastguard Worker     }
483*9880d681SAndroid Build Coastguard Worker     unsigned Reg = MO.getReg();
484*9880d681SAndroid Build Coastguard Worker     if (!Reg)
485*9880d681SAndroid Build Coastguard Worker       continue;
486*9880d681SAndroid Build Coastguard Worker     // Register size in bits.
487*9880d681SAndroid Build Coastguard Worker     // This size must match what the mapping expects.
488*9880d681SAndroid Build Coastguard Worker     assert(MOMapping.verify(getSizeInBits(
489*9880d681SAndroid Build Coastguard Worker                Reg, MF.getRegInfo(), *MF.getSubtarget().getRegisterInfo())) &&
490*9880d681SAndroid Build Coastguard Worker            "Value mapping is invalid");
491*9880d681SAndroid Build Coastguard Worker   }
492*9880d681SAndroid Build Coastguard Worker   return true;
493*9880d681SAndroid Build Coastguard Worker }
494*9880d681SAndroid Build Coastguard Worker 
dump() const495*9880d681SAndroid Build Coastguard Worker void RegisterBankInfo::InstructionMapping::dump() const {
496*9880d681SAndroid Build Coastguard Worker   print(dbgs());
497*9880d681SAndroid Build Coastguard Worker   dbgs() << '\n';
498*9880d681SAndroid Build Coastguard Worker }
499*9880d681SAndroid Build Coastguard Worker 
print(raw_ostream & OS) const500*9880d681SAndroid Build Coastguard Worker void RegisterBankInfo::InstructionMapping::print(raw_ostream &OS) const {
501*9880d681SAndroid Build Coastguard Worker   OS << "ID: " << getID() << " Cost: " << getCost() << " Mapping: ";
502*9880d681SAndroid Build Coastguard Worker 
503*9880d681SAndroid Build Coastguard Worker   for (unsigned OpIdx = 0; OpIdx != NumOperands; ++OpIdx) {
504*9880d681SAndroid Build Coastguard Worker     const ValueMapping &ValMapping = getOperandMapping(OpIdx);
505*9880d681SAndroid Build Coastguard Worker     if (OpIdx)
506*9880d681SAndroid Build Coastguard Worker       OS << ", ";
507*9880d681SAndroid Build Coastguard Worker     OS << "{ Idx: " << OpIdx << " Map: " << ValMapping << '}';
508*9880d681SAndroid Build Coastguard Worker   }
509*9880d681SAndroid Build Coastguard Worker }
510*9880d681SAndroid Build Coastguard Worker 
511*9880d681SAndroid Build Coastguard Worker const int RegisterBankInfo::OperandsMapper::DontKnowIdx = -1;
512*9880d681SAndroid Build Coastguard Worker 
OperandsMapper(MachineInstr & MI,const InstructionMapping & InstrMapping,MachineRegisterInfo & MRI)513*9880d681SAndroid Build Coastguard Worker RegisterBankInfo::OperandsMapper::OperandsMapper(
514*9880d681SAndroid Build Coastguard Worker     MachineInstr &MI, const InstructionMapping &InstrMapping,
515*9880d681SAndroid Build Coastguard Worker     MachineRegisterInfo &MRI)
516*9880d681SAndroid Build Coastguard Worker     : MRI(MRI), MI(MI), InstrMapping(InstrMapping) {
517*9880d681SAndroid Build Coastguard Worker   unsigned NumOpds = MI.getNumOperands();
518*9880d681SAndroid Build Coastguard Worker   OpToNewVRegIdx.reset(new int[NumOpds]);
519*9880d681SAndroid Build Coastguard Worker   std::fill(&OpToNewVRegIdx[0], &OpToNewVRegIdx[NumOpds],
520*9880d681SAndroid Build Coastguard Worker             OperandsMapper::DontKnowIdx);
521*9880d681SAndroid Build Coastguard Worker   assert(InstrMapping.verify(MI) && "Invalid mapping for MI");
522*9880d681SAndroid Build Coastguard Worker }
523*9880d681SAndroid Build Coastguard Worker 
524*9880d681SAndroid Build Coastguard Worker iterator_range<SmallVectorImpl<unsigned>::iterator>
getVRegsMem(unsigned OpIdx)525*9880d681SAndroid Build Coastguard Worker RegisterBankInfo::OperandsMapper::getVRegsMem(unsigned OpIdx) {
526*9880d681SAndroid Build Coastguard Worker   assert(OpIdx < getMI().getNumOperands() && "Out-of-bound access");
527*9880d681SAndroid Build Coastguard Worker   unsigned NumPartialVal =
528*9880d681SAndroid Build Coastguard Worker       getInstrMapping().getOperandMapping(OpIdx).BreakDown.size();
529*9880d681SAndroid Build Coastguard Worker   int StartIdx = OpToNewVRegIdx[OpIdx];
530*9880d681SAndroid Build Coastguard Worker 
531*9880d681SAndroid Build Coastguard Worker   if (StartIdx == OperandsMapper::DontKnowIdx) {
532*9880d681SAndroid Build Coastguard Worker     // This is the first time we try to access OpIdx.
533*9880d681SAndroid Build Coastguard Worker     // Create the cells that will hold all the partial values at the
534*9880d681SAndroid Build Coastguard Worker     // end of the list of NewVReg.
535*9880d681SAndroid Build Coastguard Worker     StartIdx = NewVRegs.size();
536*9880d681SAndroid Build Coastguard Worker     OpToNewVRegIdx[OpIdx] = StartIdx;
537*9880d681SAndroid Build Coastguard Worker     for (unsigned i = 0; i < NumPartialVal; ++i)
538*9880d681SAndroid Build Coastguard Worker       NewVRegs.push_back(0);
539*9880d681SAndroid Build Coastguard Worker   }
540*9880d681SAndroid Build Coastguard Worker   SmallVectorImpl<unsigned>::iterator End =
541*9880d681SAndroid Build Coastguard Worker       getNewVRegsEnd(StartIdx, NumPartialVal);
542*9880d681SAndroid Build Coastguard Worker 
543*9880d681SAndroid Build Coastguard Worker   return make_range(&NewVRegs[StartIdx], End);
544*9880d681SAndroid Build Coastguard Worker }
545*9880d681SAndroid Build Coastguard Worker 
546*9880d681SAndroid Build Coastguard Worker SmallVectorImpl<unsigned>::const_iterator
getNewVRegsEnd(unsigned StartIdx,unsigned NumVal) const547*9880d681SAndroid Build Coastguard Worker RegisterBankInfo::OperandsMapper::getNewVRegsEnd(unsigned StartIdx,
548*9880d681SAndroid Build Coastguard Worker                                                  unsigned NumVal) const {
549*9880d681SAndroid Build Coastguard Worker   return const_cast<OperandsMapper *>(this)->getNewVRegsEnd(StartIdx, NumVal);
550*9880d681SAndroid Build Coastguard Worker }
551*9880d681SAndroid Build Coastguard Worker SmallVectorImpl<unsigned>::iterator
getNewVRegsEnd(unsigned StartIdx,unsigned NumVal)552*9880d681SAndroid Build Coastguard Worker RegisterBankInfo::OperandsMapper::getNewVRegsEnd(unsigned StartIdx,
553*9880d681SAndroid Build Coastguard Worker                                                  unsigned NumVal) {
554*9880d681SAndroid Build Coastguard Worker   assert((NewVRegs.size() == StartIdx + NumVal ||
555*9880d681SAndroid Build Coastguard Worker           NewVRegs.size() > StartIdx + NumVal) &&
556*9880d681SAndroid Build Coastguard Worker          "NewVRegs too small to contain all the partial mapping");
557*9880d681SAndroid Build Coastguard Worker   return NewVRegs.size() <= StartIdx + NumVal ? NewVRegs.end()
558*9880d681SAndroid Build Coastguard Worker                                               : &NewVRegs[StartIdx + NumVal];
559*9880d681SAndroid Build Coastguard Worker }
560*9880d681SAndroid Build Coastguard Worker 
createVRegs(unsigned OpIdx)561*9880d681SAndroid Build Coastguard Worker void RegisterBankInfo::OperandsMapper::createVRegs(unsigned OpIdx) {
562*9880d681SAndroid Build Coastguard Worker   assert(OpIdx < getMI().getNumOperands() && "Out-of-bound access");
563*9880d681SAndroid Build Coastguard Worker   iterator_range<SmallVectorImpl<unsigned>::iterator> NewVRegsForOpIdx =
564*9880d681SAndroid Build Coastguard Worker       getVRegsMem(OpIdx);
565*9880d681SAndroid Build Coastguard Worker   const SmallVectorImpl<PartialMapping> &PartMapList =
566*9880d681SAndroid Build Coastguard Worker       getInstrMapping().getOperandMapping(OpIdx).BreakDown;
567*9880d681SAndroid Build Coastguard Worker   SmallVectorImpl<PartialMapping>::const_iterator PartMap = PartMapList.begin();
568*9880d681SAndroid Build Coastguard Worker   for (unsigned &NewVReg : NewVRegsForOpIdx) {
569*9880d681SAndroid Build Coastguard Worker     assert(PartMap != PartMapList.end() && "Out-of-bound access");
570*9880d681SAndroid Build Coastguard Worker     assert(NewVReg == 0 && "Register has already been created");
571*9880d681SAndroid Build Coastguard Worker     NewVReg = MRI.createGenericVirtualRegister(PartMap->Length);
572*9880d681SAndroid Build Coastguard Worker     MRI.setRegBank(NewVReg, *PartMap->RegBank);
573*9880d681SAndroid Build Coastguard Worker     ++PartMap;
574*9880d681SAndroid Build Coastguard Worker   }
575*9880d681SAndroid Build Coastguard Worker }
576*9880d681SAndroid Build Coastguard Worker 
setVRegs(unsigned OpIdx,unsigned PartialMapIdx,unsigned NewVReg)577*9880d681SAndroid Build Coastguard Worker void RegisterBankInfo::OperandsMapper::setVRegs(unsigned OpIdx,
578*9880d681SAndroid Build Coastguard Worker                                                 unsigned PartialMapIdx,
579*9880d681SAndroid Build Coastguard Worker                                                 unsigned NewVReg) {
580*9880d681SAndroid Build Coastguard Worker   assert(OpIdx < getMI().getNumOperands() && "Out-of-bound access");
581*9880d681SAndroid Build Coastguard Worker   assert(getInstrMapping().getOperandMapping(OpIdx).BreakDown.size() >
582*9880d681SAndroid Build Coastguard Worker              PartialMapIdx &&
583*9880d681SAndroid Build Coastguard Worker          "Out-of-bound access for partial mapping");
584*9880d681SAndroid Build Coastguard Worker   // Make sure the memory is initialized for that operand.
585*9880d681SAndroid Build Coastguard Worker   (void)getVRegsMem(OpIdx);
586*9880d681SAndroid Build Coastguard Worker   assert(NewVRegs[OpToNewVRegIdx[OpIdx] + PartialMapIdx] == 0 &&
587*9880d681SAndroid Build Coastguard Worker          "This value is already set");
588*9880d681SAndroid Build Coastguard Worker   NewVRegs[OpToNewVRegIdx[OpIdx] + PartialMapIdx] = NewVReg;
589*9880d681SAndroid Build Coastguard Worker }
590*9880d681SAndroid Build Coastguard Worker 
591*9880d681SAndroid Build Coastguard Worker iterator_range<SmallVectorImpl<unsigned>::const_iterator>
getVRegs(unsigned OpIdx,bool ForDebug) const592*9880d681SAndroid Build Coastguard Worker RegisterBankInfo::OperandsMapper::getVRegs(unsigned OpIdx,
593*9880d681SAndroid Build Coastguard Worker                                            bool ForDebug) const {
594*9880d681SAndroid Build Coastguard Worker   (void)ForDebug;
595*9880d681SAndroid Build Coastguard Worker   assert(OpIdx < getMI().getNumOperands() && "Out-of-bound access");
596*9880d681SAndroid Build Coastguard Worker   int StartIdx = OpToNewVRegIdx[OpIdx];
597*9880d681SAndroid Build Coastguard Worker 
598*9880d681SAndroid Build Coastguard Worker   if (StartIdx == OperandsMapper::DontKnowIdx)
599*9880d681SAndroid Build Coastguard Worker     return make_range(NewVRegs.end(), NewVRegs.end());
600*9880d681SAndroid Build Coastguard Worker 
601*9880d681SAndroid Build Coastguard Worker   unsigned PartMapSize =
602*9880d681SAndroid Build Coastguard Worker       getInstrMapping().getOperandMapping(OpIdx).BreakDown.size();
603*9880d681SAndroid Build Coastguard Worker   SmallVectorImpl<unsigned>::const_iterator End =
604*9880d681SAndroid Build Coastguard Worker       getNewVRegsEnd(StartIdx, PartMapSize);
605*9880d681SAndroid Build Coastguard Worker   iterator_range<SmallVectorImpl<unsigned>::const_iterator> Res =
606*9880d681SAndroid Build Coastguard Worker       make_range(&NewVRegs[StartIdx], End);
607*9880d681SAndroid Build Coastguard Worker #ifndef NDEBUG
608*9880d681SAndroid Build Coastguard Worker   for (unsigned VReg : Res)
609*9880d681SAndroid Build Coastguard Worker     assert((VReg || ForDebug) && "Some registers are uninitialized");
610*9880d681SAndroid Build Coastguard Worker #endif
611*9880d681SAndroid Build Coastguard Worker   return Res;
612*9880d681SAndroid Build Coastguard Worker }
613*9880d681SAndroid Build Coastguard Worker 
dump() const614*9880d681SAndroid Build Coastguard Worker void RegisterBankInfo::OperandsMapper::dump() const {
615*9880d681SAndroid Build Coastguard Worker   print(dbgs(), true);
616*9880d681SAndroid Build Coastguard Worker   dbgs() << '\n';
617*9880d681SAndroid Build Coastguard Worker }
618*9880d681SAndroid Build Coastguard Worker 
print(raw_ostream & OS,bool ForDebug) const619*9880d681SAndroid Build Coastguard Worker void RegisterBankInfo::OperandsMapper::print(raw_ostream &OS,
620*9880d681SAndroid Build Coastguard Worker                                              bool ForDebug) const {
621*9880d681SAndroid Build Coastguard Worker   unsigned NumOpds = getMI().getNumOperands();
622*9880d681SAndroid Build Coastguard Worker   if (ForDebug) {
623*9880d681SAndroid Build Coastguard Worker     OS << "Mapping for " << getMI() << "\nwith " << getInstrMapping() << '\n';
624*9880d681SAndroid Build Coastguard Worker     // Print out the internal state of the index table.
625*9880d681SAndroid Build Coastguard Worker     OS << "Populated indices (CellNumber, IndexInNewVRegs): ";
626*9880d681SAndroid Build Coastguard Worker     bool IsFirst = true;
627*9880d681SAndroid Build Coastguard Worker     for (unsigned Idx = 0; Idx != NumOpds; ++Idx) {
628*9880d681SAndroid Build Coastguard Worker       if (OpToNewVRegIdx[Idx] != DontKnowIdx) {
629*9880d681SAndroid Build Coastguard Worker         if (!IsFirst)
630*9880d681SAndroid Build Coastguard Worker           OS << ", ";
631*9880d681SAndroid Build Coastguard Worker         OS << '(' << Idx << ", " << OpToNewVRegIdx[Idx] << ')';
632*9880d681SAndroid Build Coastguard Worker         IsFirst = false;
633*9880d681SAndroid Build Coastguard Worker       }
634*9880d681SAndroid Build Coastguard Worker     }
635*9880d681SAndroid Build Coastguard Worker     OS << '\n';
636*9880d681SAndroid Build Coastguard Worker   } else
637*9880d681SAndroid Build Coastguard Worker     OS << "Mapping ID: " << getInstrMapping().getID() << ' ';
638*9880d681SAndroid Build Coastguard Worker 
639*9880d681SAndroid Build Coastguard Worker   OS << "Operand Mapping: ";
640*9880d681SAndroid Build Coastguard Worker   // If we have a function, we can pretty print the name of the registers.
641*9880d681SAndroid Build Coastguard Worker   // Otherwise we will print the raw numbers.
642*9880d681SAndroid Build Coastguard Worker   const TargetRegisterInfo *TRI =
643*9880d681SAndroid Build Coastguard Worker       getMI().getParent() && getMI().getParent()->getParent()
644*9880d681SAndroid Build Coastguard Worker           ? getMI().getParent()->getParent()->getSubtarget().getRegisterInfo()
645*9880d681SAndroid Build Coastguard Worker           : nullptr;
646*9880d681SAndroid Build Coastguard Worker   bool IsFirst = true;
647*9880d681SAndroid Build Coastguard Worker   for (unsigned Idx = 0; Idx != NumOpds; ++Idx) {
648*9880d681SAndroid Build Coastguard Worker     if (OpToNewVRegIdx[Idx] == DontKnowIdx)
649*9880d681SAndroid Build Coastguard Worker       continue;
650*9880d681SAndroid Build Coastguard Worker     if (!IsFirst)
651*9880d681SAndroid Build Coastguard Worker       OS << ", ";
652*9880d681SAndroid Build Coastguard Worker     IsFirst = false;
653*9880d681SAndroid Build Coastguard Worker     OS << '(' << PrintReg(getMI().getOperand(Idx).getReg(), TRI) << ", [";
654*9880d681SAndroid Build Coastguard Worker     bool IsFirstNewVReg = true;
655*9880d681SAndroid Build Coastguard Worker     for (unsigned VReg : getVRegs(Idx)) {
656*9880d681SAndroid Build Coastguard Worker       if (!IsFirstNewVReg)
657*9880d681SAndroid Build Coastguard Worker         OS << ", ";
658*9880d681SAndroid Build Coastguard Worker       IsFirstNewVReg = false;
659*9880d681SAndroid Build Coastguard Worker       OS << PrintReg(VReg, TRI);
660*9880d681SAndroid Build Coastguard Worker     }
661*9880d681SAndroid Build Coastguard Worker     OS << "])";
662*9880d681SAndroid Build Coastguard Worker   }
663*9880d681SAndroid Build Coastguard Worker }
664