1*a58d3d2aSXin Li[integer] 2*a58d3d2aSXin Li# celt/celt_decoder.c:1055:61: 0 - 1 cannot be represented in type 'unsigned int' 3*a58d3d2aSXin Lifun:celt_decode_with_ec 4*a58d3d2aSXin Li# celt/celt_decoder.c:1252:61: 0 - 1 cannot be represented in type 'opus_uint32' (aka 'unsigned int') 5*a58d3d2aSXin Lifun:celt_decode_with_ec_dred 6*a58d3d2aSXin Li# celt/celt_encoder.c:2171:75: 0 - 1 cannot be represented in type 'unsigned int' 7*a58d3d2aSXin Lifun:celt_encode_with_ec 8*a58d3d2aSXin Lifun:celt_lcg_rand 9*a58d3d2aSXin Li# celt/entcode.h:131: negation of 100 cannot be represented in type 'opus_uint32' 10*a58d3d2aSXin Lifun:celt_udiv 11*a58d3d2aSXin Li# celt/mdct.c:273 12*a58d3d2aSXin Li# celt/mdct.c:274 13*a58d3d2aSXin Li# celt/mdct.c:304 14*a58d3d2aSXin Li# celt/mdct.c:305 15*a58d3d2aSXin Li# celt/mdct.c:315 16*a58d3d2aSXin Li# celt/mdct.c:316 17*a58d3d2aSXin Li# celt/mdct.c:336 18*a58d3d2aSXin Li# celt/mdct.c:337 19*a58d3d2aSXin Lifun:clt_mdct_backward_c 20*a58d3d2aSXin Lifun:ec_dec_init 21*a58d3d2aSXin Li# celt/entdec.c:143 22*a58d3d2aSXin Lifun:ec_decode 23*a58d3d2aSXin Li# celt/entdec.c:150 24*a58d3d2aSXin Lifun:ec_decode_bin 25*a58d3d2aSXin Li# silk/NSQ_del_dec.c:537:38: -242159836 - 2132528648 cannot be represented in type 'int' 26*a58d3d2aSXin Lifun:silk_noise_shape_quantizer_del_dec 27*a58d3d2aSXin Li# silk/NSQ.c:265:25: 1318152552 + 1068143768 cannot be represented in type 'int' 28*a58d3d2aSXin Lifun:silk_noise_shape_quantizer 29*a58d3d2aSXin Li# silk/x86/NSQ_del_dec_sse4_1.c:571:28: 1162446838 - -1165932966 cannot be represented in type 'int' 30*a58d3d2aSXin Lifun:silk_noise_shape_quantizer_del_dec_sse4_1 31*a58d3d2aSXin Li# silk/fixed/x86/burg_modified_FIX_sse4_1.c:277: 1940085720 + 252655088 cannot be represented 32*a58d3d2aSXin Li# in type 'int' 33*a58d3d2aSXin Lifun:silk_burg_modified_sse4_1 34*a58d3d2aSXin Li# silk/fixed/burg_modified_FIX.c:181 1940085720 + 252655088 cannot be represented in type 'int' 35*a58d3d2aSXin Lifun:silk_burg_modified_c 36*a58d3d2aSXin Lisrc:*/celt/kiss_fft.c 37*a58d3d2aSXin Li 38*a58d3d2aSXin Li# assembly optimizations that know what they are doing 39*a58d3d2aSXin Lifun:silk_SMULWB_armv4 40*a58d3d2aSXin Lifun:silk_SMULWT_armv4 41*a58d3d2aSXin Lifun:silk_SMULWW_armv4 42*a58d3d2aSXin Lifun:silk_SMLAWW_armv4 43*a58d3d2aSXin Li# 44*a58d3d2aSXin Lifun:silk_SMULWB_armv5e 45*a58d3d2aSXin Lifun:silk_SMLAWB_armv5e 46*a58d3d2aSXin Lifun:silk_SMULWT_armv5e 47*a58d3d2aSXin Lifun:silk_SMLAWT_armv5e 48*a58d3d2aSXin Lifun:silk_SMULBB_armv5e 49*a58d3d2aSXin Lifun:silk_SMLABB_armv5e 50*a58d3d2aSXin Lifun:silk_SMULBT_armv5e 51*a58d3d2aSXin Lifun:silk_SMLABT_armv5e 52*a58d3d2aSXin Lifun:silk_ADD_SAT32_armv5e 53*a58d3d2aSXin Lifun:silk_SUB_SAT32_armv5e 54*a58d3d2aSXin Lifun:silk_CLZ16_armv5 55*a58d3d2aSXin Lifun:silk_CLZ32_armv5 56*a58d3d2aSXin Li 57*a58d3d2aSXin Li 58*a58d3d2aSXin Li# Performance related 59*a58d3d2aSXin Lifun:exp_rotation1 60*a58d3d2aSXin Lifun:haar1 61*a58d3d2aSXin Lifun:celt_preemphasis 62