1*c83a76b0SSuyog Pawar /******************************************************************************
2*c83a76b0SSuyog Pawar *
3*c83a76b0SSuyog Pawar * Copyright (C) 2018 The Android Open Source Project
4*c83a76b0SSuyog Pawar *
5*c83a76b0SSuyog Pawar * Licensed under the Apache License, Version 2.0 (the "License");
6*c83a76b0SSuyog Pawar * you may not use this file except in compliance with the License.
7*c83a76b0SSuyog Pawar * You may obtain a copy of the License at:
8*c83a76b0SSuyog Pawar *
9*c83a76b0SSuyog Pawar * http://www.apache.org/licenses/LICENSE-2.0
10*c83a76b0SSuyog Pawar *
11*c83a76b0SSuyog Pawar * Unless required by applicable law or agreed to in writing, software
12*c83a76b0SSuyog Pawar * distributed under the License is distributed on an "AS IS" BASIS,
13*c83a76b0SSuyog Pawar * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14*c83a76b0SSuyog Pawar * See the License for the specific language governing permissions and
15*c83a76b0SSuyog Pawar * limitations under the License.
16*c83a76b0SSuyog Pawar *
17*c83a76b0SSuyog Pawar *****************************************************************************
18*c83a76b0SSuyog Pawar * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19*c83a76b0SSuyog Pawar */
20*c83a76b0SSuyog Pawar
21*c83a76b0SSuyog Pawar /*!
22*c83a76b0SSuyog Pawar ******************************************************************************
23*c83a76b0SSuyog Pawar * \file ihevce_hle_interface.c
24*c83a76b0SSuyog Pawar *
25*c83a76b0SSuyog Pawar * \brief
26*c83a76b0SSuyog Pawar * This file contains all the functions related High level encoder
27*c83a76b0SSuyog Pawar * Interface layer
28*c83a76b0SSuyog Pawar *
29*c83a76b0SSuyog Pawar * \date
30*c83a76b0SSuyog Pawar * 18/09/2012
31*c83a76b0SSuyog Pawar *
32*c83a76b0SSuyog Pawar * \author
33*c83a76b0SSuyog Pawar * Ittiam
34*c83a76b0SSuyog Pawar *
35*c83a76b0SSuyog Pawar * List of Functions
36*c83a76b0SSuyog Pawar * <TODO: TO BE ADDED>
37*c83a76b0SSuyog Pawar *
38*c83a76b0SSuyog Pawar ******************************************************************************
39*c83a76b0SSuyog Pawar */
40*c83a76b0SSuyog Pawar
41*c83a76b0SSuyog Pawar /*****************************************************************************/
42*c83a76b0SSuyog Pawar /* File Includes */
43*c83a76b0SSuyog Pawar /*****************************************************************************/
44*c83a76b0SSuyog Pawar /* System include files */
45*c83a76b0SSuyog Pawar #include <stdio.h>
46*c83a76b0SSuyog Pawar #include <string.h>
47*c83a76b0SSuyog Pawar #include <stdlib.h>
48*c83a76b0SSuyog Pawar #include <assert.h>
49*c83a76b0SSuyog Pawar #include <stdarg.h>
50*c83a76b0SSuyog Pawar #include <math.h>
51*c83a76b0SSuyog Pawar #include <time.h>
52*c83a76b0SSuyog Pawar
53*c83a76b0SSuyog Pawar /* User include files */
54*c83a76b0SSuyog Pawar #include "ihevc_typedefs.h"
55*c83a76b0SSuyog Pawar #include "itt_video_api.h"
56*c83a76b0SSuyog Pawar #include "ihevce_api.h"
57*c83a76b0SSuyog Pawar
58*c83a76b0SSuyog Pawar #include "rc_cntrl_param.h"
59*c83a76b0SSuyog Pawar #include "rc_frame_info_collector.h"
60*c83a76b0SSuyog Pawar #include "rc_look_ahead_params.h"
61*c83a76b0SSuyog Pawar
62*c83a76b0SSuyog Pawar #include "ihevc_defs.h"
63*c83a76b0SSuyog Pawar #include "ihevc_macros.h"
64*c83a76b0SSuyog Pawar #include "ihevc_debug.h"
65*c83a76b0SSuyog Pawar #include "ihevc_structs.h"
66*c83a76b0SSuyog Pawar #include "ihevc_platform_macros.h"
67*c83a76b0SSuyog Pawar #include "ihevc_deblk.h"
68*c83a76b0SSuyog Pawar #include "ihevc_itrans_recon.h"
69*c83a76b0SSuyog Pawar #include "ihevc_chroma_itrans_recon.h"
70*c83a76b0SSuyog Pawar #include "ihevc_chroma_intra_pred.h"
71*c83a76b0SSuyog Pawar #include "ihevc_intra_pred.h"
72*c83a76b0SSuyog Pawar #include "ihevc_inter_pred.h"
73*c83a76b0SSuyog Pawar #include "ihevc_mem_fns.h"
74*c83a76b0SSuyog Pawar #include "ihevc_padding.h"
75*c83a76b0SSuyog Pawar #include "ihevc_weighted_pred.h"
76*c83a76b0SSuyog Pawar #include "ihevc_sao.h"
77*c83a76b0SSuyog Pawar #include "ihevc_resi_trans.h"
78*c83a76b0SSuyog Pawar #include "ihevc_quant_iquant_ssd.h"
79*c83a76b0SSuyog Pawar #include "ihevc_cabac_tables.h"
80*c83a76b0SSuyog Pawar #include "ihevc_trans_tables.h"
81*c83a76b0SSuyog Pawar #include "ihevc_trans_macros.h"
82*c83a76b0SSuyog Pawar
83*c83a76b0SSuyog Pawar #include "ihevce_defs.h"
84*c83a76b0SSuyog Pawar #include "ihevce_hle_interface.h"
85*c83a76b0SSuyog Pawar #include "ihevce_hle_q_func.h"
86*c83a76b0SSuyog Pawar #include "ihevce_buffer_que_interface.h"
87*c83a76b0SSuyog Pawar #include "ihevce_lap_enc_structs.h"
88*c83a76b0SSuyog Pawar #include "ihevce_multi_thrd_structs.h"
89*c83a76b0SSuyog Pawar #include "ihevce_multi_thrd_funcs.h"
90*c83a76b0SSuyog Pawar #include "ihevce_me_common_defs.h"
91*c83a76b0SSuyog Pawar #include "ihevce_had_satd.h"
92*c83a76b0SSuyog Pawar #include "ihevce_error_codes.h"
93*c83a76b0SSuyog Pawar #include "ihevce_error_checks.h"
94*c83a76b0SSuyog Pawar #include "ihevce_bitstream.h"
95*c83a76b0SSuyog Pawar #include "ihevce_cabac.h"
96*c83a76b0SSuyog Pawar #include "ihevce_rdoq_macros.h"
97*c83a76b0SSuyog Pawar #include "ihevce_function_selector.h"
98*c83a76b0SSuyog Pawar #include "ihevce_enc_structs.h"
99*c83a76b0SSuyog Pawar #include "ihevce_cmn_utils_instr_set_router.h"
100*c83a76b0SSuyog Pawar #include "ihevce_memory_init.h"
101*c83a76b0SSuyog Pawar #include "ihevce_lap_interface.h"
102*c83a76b0SSuyog Pawar #include "ihevce_entropy_cod.h"
103*c83a76b0SSuyog Pawar #include "ihevce_entropy_structs.h"
104*c83a76b0SSuyog Pawar #include "ihevce_frame_process_utils.h"
105*c83a76b0SSuyog Pawar #include "ihevce_frame_process.h"
106*c83a76b0SSuyog Pawar #include "ihevce_profile.h"
107*c83a76b0SSuyog Pawar #include "ihevce_global_tables.h"
108*c83a76b0SSuyog Pawar #include "ihevce_dep_mngr_interface.h"
109*c83a76b0SSuyog Pawar #include "ihevce_common_utils.h"
110*c83a76b0SSuyog Pawar #include "hme_datatype.h"
111*c83a76b0SSuyog Pawar #include "hme_interface.h"
112*c83a76b0SSuyog Pawar #include "hme_common_defs.h"
113*c83a76b0SSuyog Pawar #include "hme_defs.h"
114*c83a76b0SSuyog Pawar #include "ihevce_coarse_me_pass.h"
115*c83a76b0SSuyog Pawar #include "ihevce_me_pass.h"
116*c83a76b0SSuyog Pawar #include "ihevce_enc_loop_structs.h"
117*c83a76b0SSuyog Pawar #include "ihevce_enc_loop_pass.h"
118*c83a76b0SSuyog Pawar
119*c83a76b0SSuyog Pawar #include "cast_types.h"
120*c83a76b0SSuyog Pawar #include "osal.h"
121*c83a76b0SSuyog Pawar #include "osal_defaults.h"
122*c83a76b0SSuyog Pawar
123*c83a76b0SSuyog Pawar /*****************************************************************************/
124*c83a76b0SSuyog Pawar /* Function Definitions */
125*c83a76b0SSuyog Pawar /*****************************************************************************/
126*c83a76b0SSuyog Pawar /*!
127*c83a76b0SSuyog Pawar ******************************************************************************
128*c83a76b0SSuyog Pawar * \if Function name : ihevce_context_reset \endif
129*c83a76b0SSuyog Pawar *
130*c83a76b0SSuyog Pawar * \brief
131*c83a76b0SSuyog Pawar * Encoder reset function
132*c83a76b0SSuyog Pawar *
133*c83a76b0SSuyog Pawar * \param[in] Encoder context pointer
134*c83a76b0SSuyog Pawar *
135*c83a76b0SSuyog Pawar * \return
136*c83a76b0SSuyog Pawar * None
137*c83a76b0SSuyog Pawar *
138*c83a76b0SSuyog Pawar * \author
139*c83a76b0SSuyog Pawar * Ittiam
140*c83a76b0SSuyog Pawar *
141*c83a76b0SSuyog Pawar *****************************************************************************
142*c83a76b0SSuyog Pawar */
ihevce_context_reset(enc_ctxt_t * ps_enc_ctxt)143*c83a76b0SSuyog Pawar void ihevce_context_reset(enc_ctxt_t *ps_enc_ctxt)
144*c83a76b0SSuyog Pawar {
145*c83a76b0SSuyog Pawar ps_enc_ctxt->i4_end_flag = 0;
146*c83a76b0SSuyog Pawar
147*c83a76b0SSuyog Pawar /* set the queue related pointer and buffer to default value */
148*c83a76b0SSuyog Pawar ps_enc_ctxt->s_enc_ques.pv_q_mutex_hdl = NULL;
149*c83a76b0SSuyog Pawar
150*c83a76b0SSuyog Pawar /* Reset the i/o queues created status to 0 */
151*c83a76b0SSuyog Pawar ps_enc_ctxt->i4_io_queues_created = 0;
152*c83a76b0SSuyog Pawar
153*c83a76b0SSuyog Pawar /* reset the frame limit flag to 0 */
154*c83a76b0SSuyog Pawar ps_enc_ctxt->i4_frame_limit_reached = 0;
155*c83a76b0SSuyog Pawar
156*c83a76b0SSuyog Pawar return;
157*c83a76b0SSuyog Pawar }
158*c83a76b0SSuyog Pawar
159*c83a76b0SSuyog Pawar /*!
160*c83a76b0SSuyog Pawar ******************************************************************************
161*c83a76b0SSuyog Pawar * \if Function name : ihevce_hle_interface_create \endif
162*c83a76b0SSuyog Pawar *
163*c83a76b0SSuyog Pawar * \brief
164*c83a76b0SSuyog Pawar * High level Encoder create function
165*c83a76b0SSuyog Pawar *
166*c83a76b0SSuyog Pawar * \param[in] High level encoder interface context pointer
167*c83a76b0SSuyog Pawar *
168*c83a76b0SSuyog Pawar * \return
169*c83a76b0SSuyog Pawar * success or fail
170*c83a76b0SSuyog Pawar *
171*c83a76b0SSuyog Pawar * \author
172*c83a76b0SSuyog Pawar * Ittiam
173*c83a76b0SSuyog Pawar *
174*c83a76b0SSuyog Pawar *****************************************************************************
175*c83a76b0SSuyog Pawar */
ihevce_hle_interface_create(ihevce_hle_ctxt_t * ps_hle_ctxt)176*c83a76b0SSuyog Pawar IV_API_CALL_STATUS_T ihevce_hle_interface_create(ihevce_hle_ctxt_t *ps_hle_ctxt)
177*c83a76b0SSuyog Pawar {
178*c83a76b0SSuyog Pawar /* local variables */
179*c83a76b0SSuyog Pawar enc_ctxt_t *ps_enc_ctxt;
180*c83a76b0SSuyog Pawar iv_mem_rec_t s_memtab;
181*c83a76b0SSuyog Pawar ihevce_static_cfg_params_t *ps_enc_static_cfg_params;
182*c83a76b0SSuyog Pawar WORD32 i4_num_resolutions = ps_hle_ctxt->ps_static_cfg_prms->s_tgt_lyr_prms.i4_num_res_layers;
183*c83a76b0SSuyog Pawar WORD32 i4_look_ahead_frames_in_first_pass = -1;
184*c83a76b0SSuyog Pawar WORD32 i4_total_cores = 0, ctr, i4_mres_flag = 0;
185*c83a76b0SSuyog Pawar ihevce_sys_api_t *ps_sys_api = &ps_hle_ctxt->ps_static_cfg_prms->s_sys_api;
186*c83a76b0SSuyog Pawar
187*c83a76b0SSuyog Pawar WORD32 status = 0;
188*c83a76b0SSuyog Pawar WORD32 i;
189*c83a76b0SSuyog Pawar WORD32 *pi4_active_res_id = NULL;
190*c83a76b0SSuyog Pawar
191*c83a76b0SSuyog Pawar /* OSAL Init */
192*c83a76b0SSuyog Pawar status = ihevce_osal_init((void *)ps_hle_ctxt);
193*c83a76b0SSuyog Pawar
194*c83a76b0SSuyog Pawar if(status != 0)
195*c83a76b0SSuyog Pawar return (IV_FAIL);
196*c83a76b0SSuyog Pawar
197*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
198*c83a76b0SSuyog Pawar /* High Level Encoder Init */
199*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
200*c83a76b0SSuyog Pawar
201*c83a76b0SSuyog Pawar if(i4_num_resolutions > 1)
202*c83a76b0SSuyog Pawar i4_mres_flag = 1;
203*c83a76b0SSuyog Pawar /* set no error in the output */
204*c83a76b0SSuyog Pawar ps_hle_ctxt->i4_error_code = 0;
205*c83a76b0SSuyog Pawar
206*c83a76b0SSuyog Pawar /* Error checks on the static parameters passed */
207*c83a76b0SSuyog Pawar ps_hle_ctxt->i4_error_code = ihevce_hle_validate_static_params(ps_hle_ctxt->ps_static_cfg_prms);
208*c83a76b0SSuyog Pawar
209*c83a76b0SSuyog Pawar /*memory for static cfg params for encoder, which can be overwritten if encoder wants
210*c83a76b0SSuyog Pawar encoder should use this for all its usage*/
211*c83a76b0SSuyog Pawar s_memtab.i4_size = sizeof(iv_mem_rec_t);
212*c83a76b0SSuyog Pawar s_memtab.i4_mem_alignment = 4;
213*c83a76b0SSuyog Pawar s_memtab.i4_mem_size = sizeof(ihevce_static_cfg_params_t);
214*c83a76b0SSuyog Pawar s_memtab.e_mem_type = IV_EXT_CACHEABLE_NORMAL_MEM;
215*c83a76b0SSuyog Pawar
216*c83a76b0SSuyog Pawar ps_hle_ctxt->ihevce_mem_alloc(
217*c83a76b0SSuyog Pawar ps_hle_ctxt->pv_mem_mgr_hdl, &ps_hle_ctxt->ps_static_cfg_prms->s_sys_api, &s_memtab);
218*c83a76b0SSuyog Pawar if(s_memtab.pv_base == NULL)
219*c83a76b0SSuyog Pawar {
220*c83a76b0SSuyog Pawar return (IV_FAIL);
221*c83a76b0SSuyog Pawar }
222*c83a76b0SSuyog Pawar ps_enc_static_cfg_params = (ihevce_static_cfg_params_t *)s_memtab.pv_base;
223*c83a76b0SSuyog Pawar memcpy(
224*c83a76b0SSuyog Pawar ps_enc_static_cfg_params,
225*c83a76b0SSuyog Pawar ps_hle_ctxt->ps_static_cfg_prms,
226*c83a76b0SSuyog Pawar (sizeof(ihevce_static_cfg_params_t)));
227*c83a76b0SSuyog Pawar
228*c83a76b0SSuyog Pawar i4_total_cores = ps_enc_static_cfg_params->s_multi_thrd_prms.i4_max_num_cores;
229*c83a76b0SSuyog Pawar
230*c83a76b0SSuyog Pawar /* check for validity of memory control flag (only 0,1,2 modes are allowed) */
231*c83a76b0SSuyog Pawar if((ps_enc_static_cfg_params->s_multi_thrd_prms.i4_memory_alloc_ctrl_flag > 2) ||
232*c83a76b0SSuyog Pawar (ps_enc_static_cfg_params->s_multi_thrd_prms.i4_memory_alloc_ctrl_flag < 0))
233*c83a76b0SSuyog Pawar {
234*c83a76b0SSuyog Pawar ps_hle_ctxt->i4_error_code = IHEVCE_INVALID_MEM_CTRL_FLAG;
235*c83a76b0SSuyog Pawar }
236*c83a76b0SSuyog Pawar
237*c83a76b0SSuyog Pawar if((i4_mres_flag == 1) &&
238*c83a76b0SSuyog Pawar (ps_enc_static_cfg_params->s_multi_thrd_prms.i4_use_thrd_affinity == 1))
239*c83a76b0SSuyog Pawar {
240*c83a76b0SSuyog Pawar ps_sys_api->ihevce_printf(
241*c83a76b0SSuyog Pawar ps_sys_api->pv_cb_handle,
242*c83a76b0SSuyog Pawar "\nIHEVCE WARNING: Enabling thread affinity in multiresolution encoding will affect "
243*c83a76b0SSuyog Pawar "performance\n");
244*c83a76b0SSuyog Pawar }
245*c83a76b0SSuyog Pawar if((ps_enc_static_cfg_params->s_tgt_lyr_prms.as_tgt_params[0].i4_quality_preset ==
246*c83a76b0SSuyog Pawar IHEVCE_QUALITY_P6) &&
247*c83a76b0SSuyog Pawar (ps_enc_static_cfg_params->s_config_prms.i4_cu_level_rc))
248*c83a76b0SSuyog Pawar {
249*c83a76b0SSuyog Pawar ps_sys_api->ihevce_printf(
250*c83a76b0SSuyog Pawar ps_sys_api->pv_cb_handle,
251*c83a76b0SSuyog Pawar "\nIHEVCE WARNING: Disabling CU level QP modulation for P6 preset\n");
252*c83a76b0SSuyog Pawar ps_enc_static_cfg_params->s_config_prms.i4_cu_level_rc = 0;
253*c83a76b0SSuyog Pawar }
254*c83a76b0SSuyog Pawar if((ps_enc_static_cfg_params->s_tgt_lyr_prms.as_tgt_params[0].i4_quality_preset ==
255*c83a76b0SSuyog Pawar IHEVCE_QUALITY_P7) &&
256*c83a76b0SSuyog Pawar (ps_enc_static_cfg_params->s_config_prms.i4_cu_level_rc))
257*c83a76b0SSuyog Pawar {
258*c83a76b0SSuyog Pawar ps_sys_api->ihevce_printf(
259*c83a76b0SSuyog Pawar ps_sys_api->pv_cb_handle,
260*c83a76b0SSuyog Pawar "\nIHEVCE WARNING: Disabling CU level QP modulation for P7 preset\n");
261*c83a76b0SSuyog Pawar ps_enc_static_cfg_params->s_config_prms.i4_cu_level_rc = 0;
262*c83a76b0SSuyog Pawar }
263*c83a76b0SSuyog Pawar
264*c83a76b0SSuyog Pawar if(0 != ps_hle_ctxt->i4_error_code)
265*c83a76b0SSuyog Pawar {
266*c83a76b0SSuyog Pawar ps_hle_ctxt->ihevce_mem_free(ps_hle_ctxt->pv_mem_mgr_hdl, &s_memtab);
267*c83a76b0SSuyog Pawar return (IV_FAIL);
268*c83a76b0SSuyog Pawar }
269*c83a76b0SSuyog Pawar ps_hle_ctxt->ai4_num_core_per_res[0] = i4_total_cores;
270*c83a76b0SSuyog Pawar
271*c83a76b0SSuyog Pawar if(1 == ps_enc_static_cfg_params->s_tgt_lyr_prms.i4_mres_single_out)
272*c83a76b0SSuyog Pawar {
273*c83a76b0SSuyog Pawar /* Memory Allocation of pi4_active_res_id */
274*c83a76b0SSuyog Pawar s_memtab.i4_size = sizeof(iv_mem_rec_t);
275*c83a76b0SSuyog Pawar s_memtab.i4_mem_alignment = 4;
276*c83a76b0SSuyog Pawar s_memtab.i4_mem_size = sizeof(WORD32) * (IHEVCE_MAX_NUM_RESOLUTIONS + 1);
277*c83a76b0SSuyog Pawar s_memtab.e_mem_type = IV_EXT_CACHEABLE_NORMAL_MEM;
278*c83a76b0SSuyog Pawar
279*c83a76b0SSuyog Pawar ps_hle_ctxt->ihevce_mem_alloc(
280*c83a76b0SSuyog Pawar ps_hle_ctxt->pv_mem_mgr_hdl, &ps_enc_static_cfg_params->s_sys_api, &s_memtab);
281*c83a76b0SSuyog Pawar if(s_memtab.pv_base == NULL)
282*c83a76b0SSuyog Pawar {
283*c83a76b0SSuyog Pawar return (IV_FAIL);
284*c83a76b0SSuyog Pawar }
285*c83a76b0SSuyog Pawar
286*c83a76b0SSuyog Pawar pi4_active_res_id = (WORD32 *)s_memtab.pv_base;
287*c83a76b0SSuyog Pawar }
288*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
289*c83a76b0SSuyog Pawar /* Context and Memory Initialization of Encoder ctxt */
290*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
291*c83a76b0SSuyog Pawar for(ctr = 0; ctr < i4_num_resolutions; ctr++)
292*c83a76b0SSuyog Pawar {
293*c83a76b0SSuyog Pawar WORD32 i4_br_id;
294*c83a76b0SSuyog Pawar s_memtab.i4_size = sizeof(iv_mem_rec_t);
295*c83a76b0SSuyog Pawar s_memtab.i4_mem_alignment = 4;
296*c83a76b0SSuyog Pawar s_memtab.i4_mem_size = sizeof(enc_ctxt_t);
297*c83a76b0SSuyog Pawar s_memtab.e_mem_type = IV_EXT_CACHEABLE_NORMAL_MEM;
298*c83a76b0SSuyog Pawar
299*c83a76b0SSuyog Pawar ps_hle_ctxt->ihevce_mem_alloc(
300*c83a76b0SSuyog Pawar ps_hle_ctxt->pv_mem_mgr_hdl, &ps_enc_static_cfg_params->s_sys_api, &s_memtab);
301*c83a76b0SSuyog Pawar if(s_memtab.pv_base == NULL)
302*c83a76b0SSuyog Pawar {
303*c83a76b0SSuyog Pawar return (IV_FAIL);
304*c83a76b0SSuyog Pawar }
305*c83a76b0SSuyog Pawar
306*c83a76b0SSuyog Pawar ps_enc_ctxt = (enc_ctxt_t *)s_memtab.pv_base;
307*c83a76b0SSuyog Pawar
308*c83a76b0SSuyog Pawar ps_enc_ctxt->ps_stat_prms = ps_enc_static_cfg_params;
309*c83a76b0SSuyog Pawar
310*c83a76b0SSuyog Pawar /* check of number of cores to decide the num threads active */
311*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.i4_all_thrds_active_flag = 1;
312*c83a76b0SSuyog Pawar
313*c83a76b0SSuyog Pawar if(1 == ps_enc_static_cfg_params->s_tgt_lyr_prms.i4_mres_single_out)
314*c83a76b0SSuyog Pawar {
315*c83a76b0SSuyog Pawar pi4_active_res_id[ctr] = 0;
316*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.pi4_active_res_id = pi4_active_res_id;
317*c83a76b0SSuyog Pawar }
318*c83a76b0SSuyog Pawar
319*c83a76b0SSuyog Pawar /*store num bit-rate instances in the encoder context */
320*c83a76b0SSuyog Pawar ps_enc_ctxt->i4_num_bitrates =
321*c83a76b0SSuyog Pawar ps_enc_static_cfg_params->s_tgt_lyr_prms.as_tgt_params[ctr].i4_num_bitrate_instances;
322*c83a76b0SSuyog Pawar if(BLU_RAY_SUPPORT == ps_enc_static_cfg_params->s_out_strm_prms.i4_interop_flags)
323*c83a76b0SSuyog Pawar {
324*c83a76b0SSuyog Pawar ps_enc_ctxt->i4_blu_ray_spec = 1;
325*c83a76b0SSuyog Pawar }
326*c83a76b0SSuyog Pawar else
327*c83a76b0SSuyog Pawar {
328*c83a76b0SSuyog Pawar ps_enc_ctxt->i4_blu_ray_spec = 0;
329*c83a76b0SSuyog Pawar }
330*c83a76b0SSuyog Pawar
331*c83a76b0SSuyog Pawar /* if all threads are required to be active */
332*c83a76b0SSuyog Pawar if(1 == ps_enc_ctxt->s_multi_thrd.i4_all_thrds_active_flag)
333*c83a76b0SSuyog Pawar {
334*c83a76b0SSuyog Pawar /* store the number of threads to be created as passed by app with HT flag */
335*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.i4_num_enc_proc_thrds =
336*c83a76b0SSuyog Pawar ps_hle_ctxt->ai4_num_core_per_res[ctr];
337*c83a76b0SSuyog Pawar
338*c83a76b0SSuyog Pawar /* pre enc threads are doubled if HT is ON */
339*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.i4_num_pre_enc_proc_thrds =
340*c83a76b0SSuyog Pawar ps_hle_ctxt->ai4_num_core_per_res[ctr];
341*c83a76b0SSuyog Pawar }
342*c83a76b0SSuyog Pawar else
343*c83a76b0SSuyog Pawar {
344*c83a76b0SSuyog Pawar // TODO: distribute threads across stages
345*c83a76b0SSuyog Pawar }
346*c83a76b0SSuyog Pawar
347*c83a76b0SSuyog Pawar /*Keep track of resolution id, this is used to differentiate from other encoder instance*/
348*c83a76b0SSuyog Pawar ps_enc_ctxt->i4_resolution_id = ctr;
349*c83a76b0SSuyog Pawar /* store hle ctxt in enc ctxt */
350*c83a76b0SSuyog Pawar ps_enc_ctxt->pv_hle_ctxt = (void *)ps_hle_ctxt;
351*c83a76b0SSuyog Pawar ps_enc_ctxt->pv_rc_mutex_lock_hdl = NULL;
352*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.pv_sub_pic_rc_mutex_lock_hdl = NULL;
353*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.pv_sub_pic_rc_for_qp_update_mutex_lock_hdl = NULL;
354*c83a76b0SSuyog Pawar ps_enc_ctxt->i4_look_ahead_frames_in_first_pass = i4_look_ahead_frames_in_first_pass;
355*c83a76b0SSuyog Pawar
356*c83a76b0SSuyog Pawar ps_enc_ctxt->ai4_is_past_pic_complex[0] = 0;
357*c83a76b0SSuyog Pawar ps_enc_ctxt->ai4_is_past_pic_complex[1] = 0;
358*c83a76b0SSuyog Pawar ps_enc_ctxt->i4_is_I_reset_done = 1;
359*c83a76b0SSuyog Pawar ps_enc_ctxt->i4_past_RC_reset_count = 0;
360*c83a76b0SSuyog Pawar ps_enc_ctxt->i4_future_RC_reset = 0;
361*c83a76b0SSuyog Pawar ps_enc_ctxt->i4_past_RC_scd_reset_count = 0;
362*c83a76b0SSuyog Pawar ps_enc_ctxt->i4_future_RC_scd_reset = 0;
363*c83a76b0SSuyog Pawar ps_enc_ctxt->i4_active_scene_num = -1;
364*c83a76b0SSuyog Pawar for(i = 0; i < IHEVCE_MAX_NUM_BITRATES; i++)
365*c83a76b0SSuyog Pawar {
366*c83a76b0SSuyog Pawar ps_enc_ctxt->ai4_rc_query[i] = 0;
367*c83a76b0SSuyog Pawar }
368*c83a76b0SSuyog Pawar ps_enc_ctxt->i4_active_enc_frame_id = 0;
369*c83a76b0SSuyog Pawar ps_enc_ctxt->u1_is_popcnt_available = 1;
370*c83a76b0SSuyog Pawar
371*c83a76b0SSuyog Pawar #ifndef ARM
372*c83a76b0SSuyog Pawar ps_enc_ctxt->e_arch_type = ARCH_X86_GENERIC;
373*c83a76b0SSuyog Pawar ps_enc_ctxt->u1_is_popcnt_available = 0;
374*c83a76b0SSuyog Pawar #else
375*c83a76b0SSuyog Pawar if(ps_enc_static_cfg_params->e_arch_type == ARCH_NA)
376*c83a76b0SSuyog Pawar ps_enc_ctxt->e_arch_type = ihevce_default_arch();
377*c83a76b0SSuyog Pawar else
378*c83a76b0SSuyog Pawar ps_enc_ctxt->e_arch_type = ps_enc_static_cfg_params->e_arch_type;
379*c83a76b0SSuyog Pawar ps_enc_ctxt->u1_is_popcnt_available = 0;
380*c83a76b0SSuyog Pawar #endif
381*c83a76b0SSuyog Pawar
382*c83a76b0SSuyog Pawar {
383*c83a76b0SSuyog Pawar ps_enc_static_cfg_params->e_arch_type = ps_enc_ctxt->e_arch_type;
384*c83a76b0SSuyog Pawar
385*c83a76b0SSuyog Pawar ihevce_init_function_ptr(ps_enc_ctxt, ps_enc_ctxt->e_arch_type);
386*c83a76b0SSuyog Pawar }
387*c83a76b0SSuyog Pawar
388*c83a76b0SSuyog Pawar ihevce_mem_manager_init(ps_enc_ctxt, ps_hle_ctxt);
389*c83a76b0SSuyog Pawar
390*c83a76b0SSuyog Pawar if(0 != ps_hle_ctxt->i4_error_code)
391*c83a76b0SSuyog Pawar {
392*c83a76b0SSuyog Pawar return (IV_FAIL);
393*c83a76b0SSuyog Pawar }
394*c83a76b0SSuyog Pawar
395*c83a76b0SSuyog Pawar /* mutex lock for RC calls */
396*c83a76b0SSuyog Pawar ps_enc_ctxt->pv_rc_mutex_lock_hdl = osal_mutex_create(ps_hle_ctxt->pv_osal_handle);
397*c83a76b0SSuyog Pawar if(NULL == ps_enc_ctxt->pv_rc_mutex_lock_hdl)
398*c83a76b0SSuyog Pawar {
399*c83a76b0SSuyog Pawar return IV_FAIL;
400*c83a76b0SSuyog Pawar }
401*c83a76b0SSuyog Pawar
402*c83a76b0SSuyog Pawar /* mutex lock for Sub pic RC calls */
403*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.pv_sub_pic_rc_mutex_lock_hdl =
404*c83a76b0SSuyog Pawar osal_mutex_create(ps_hle_ctxt->pv_osal_handle);
405*c83a76b0SSuyog Pawar if(NULL == ps_enc_ctxt->s_multi_thrd.pv_sub_pic_rc_mutex_lock_hdl)
406*c83a76b0SSuyog Pawar {
407*c83a76b0SSuyog Pawar return IV_FAIL;
408*c83a76b0SSuyog Pawar }
409*c83a76b0SSuyog Pawar
410*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.pv_sub_pic_rc_for_qp_update_mutex_lock_hdl =
411*c83a76b0SSuyog Pawar osal_mutex_create(ps_hle_ctxt->pv_osal_handle);
412*c83a76b0SSuyog Pawar if(NULL == ps_enc_ctxt->s_multi_thrd.pv_sub_pic_rc_for_qp_update_mutex_lock_hdl)
413*c83a76b0SSuyog Pawar {
414*c83a76b0SSuyog Pawar return IV_FAIL;
415*c83a76b0SSuyog Pawar }
416*c83a76b0SSuyog Pawar
417*c83a76b0SSuyog Pawar /* reset the encoder context */
418*c83a76b0SSuyog Pawar ihevce_context_reset(ps_enc_ctxt);
419*c83a76b0SSuyog Pawar
420*c83a76b0SSuyog Pawar /* register the Encoder context in HLE interface ctxt */
421*c83a76b0SSuyog Pawar ps_hle_ctxt->apv_enc_hdl[ctr] = ps_enc_ctxt;
422*c83a76b0SSuyog Pawar }
423*c83a76b0SSuyog Pawar /* init profile */
424*c83a76b0SSuyog Pawar PROFILE_INIT(&ps_hle_ctxt->profile_hle);
425*c83a76b0SSuyog Pawar for(ctr = 0; ctr < i4_num_resolutions; ctr++)
426*c83a76b0SSuyog Pawar {
427*c83a76b0SSuyog Pawar WORD32 i4_br_id;
428*c83a76b0SSuyog Pawar
429*c83a76b0SSuyog Pawar PROFILE_INIT(&ps_hle_ctxt->profile_enc_me[ctr]);
430*c83a76b0SSuyog Pawar PROFILE_INIT(&ps_hle_ctxt->profile_pre_enc_l1l2[ctr]);
431*c83a76b0SSuyog Pawar PROFILE_INIT(&ps_hle_ctxt->profile_pre_enc_l0ipe[ctr]);
432*c83a76b0SSuyog Pawar for(i4_br_id = 0; i4_br_id < ps_enc_ctxt->i4_num_bitrates; i4_br_id++)
433*c83a76b0SSuyog Pawar {
434*c83a76b0SSuyog Pawar PROFILE_INIT(&ps_hle_ctxt->profile_enc[ctr][i4_br_id]);
435*c83a76b0SSuyog Pawar PROFILE_INIT(&ps_hle_ctxt->profile_entropy[ctr][i4_br_id]);
436*c83a76b0SSuyog Pawar }
437*c83a76b0SSuyog Pawar }
438*c83a76b0SSuyog Pawar if(1 == ps_enc_static_cfg_params->s_tgt_lyr_prms.i4_mres_single_out)
439*c83a76b0SSuyog Pawar pi4_active_res_id[i4_num_resolutions] = 0;
440*c83a76b0SSuyog Pawar
441*c83a76b0SSuyog Pawar return (IV_SUCCESS);
442*c83a76b0SSuyog Pawar }
443*c83a76b0SSuyog Pawar
444*c83a76b0SSuyog Pawar /*!
445*c83a76b0SSuyog Pawar ******************************************************************************
446*c83a76b0SSuyog Pawar * \if Function name : ihevce_query_io_buf_req \endif
447*c83a76b0SSuyog Pawar *
448*c83a76b0SSuyog Pawar * \brief
449*c83a76b0SSuyog Pawar * High level Encoder IO buffers query function
450*c83a76b0SSuyog Pawar *
451*c83a76b0SSuyog Pawar * \param[in] High level encoder interface context pointer
452*c83a76b0SSuyog Pawar * \param[out] Input buffer requirment stucture pointer.
453*c83a76b0SSuyog Pawar * \param[out] Output buffer requirment stucture pointer.
454*c83a76b0SSuyog Pawar *
455*c83a76b0SSuyog Pawar * \return
456*c83a76b0SSuyog Pawar * success or fail
457*c83a76b0SSuyog Pawar *
458*c83a76b0SSuyog Pawar * \author
459*c83a76b0SSuyog Pawar * Ittiam
460*c83a76b0SSuyog Pawar *
461*c83a76b0SSuyog Pawar *****************************************************************************
462*c83a76b0SSuyog Pawar */
ihevce_query_io_buf_req(ihevce_hle_ctxt_t * ps_hle_ctxt,iv_input_bufs_req_t * ps_input_bufs_req,iv_res_layer_output_bufs_req_t * ps_res_layer_output_bufs_req,iv_res_layer_recon_bufs_req_t * ps_res_layer_recon_bufs_req)463*c83a76b0SSuyog Pawar IV_API_CALL_STATUS_T ihevce_query_io_buf_req(
464*c83a76b0SSuyog Pawar ihevce_hle_ctxt_t *ps_hle_ctxt,
465*c83a76b0SSuyog Pawar iv_input_bufs_req_t *ps_input_bufs_req,
466*c83a76b0SSuyog Pawar iv_res_layer_output_bufs_req_t *ps_res_layer_output_bufs_req,
467*c83a76b0SSuyog Pawar iv_res_layer_recon_bufs_req_t *ps_res_layer_recon_bufs_req)
468*c83a76b0SSuyog Pawar {
469*c83a76b0SSuyog Pawar /* local variables */
470*c83a76b0SSuyog Pawar enc_ctxt_t *ps_enc_ctxt;
471*c83a76b0SSuyog Pawar ihevce_src_params_t *ps_src_prms;
472*c83a76b0SSuyog Pawar WORD32 ctb_align_pic_wd;
473*c83a76b0SSuyog Pawar WORD32 ctb_align_pic_ht, i4_resolution_id = 0, i4_num_resolutions, i4_num_bitrate_instances;
474*c83a76b0SSuyog Pawar WORD32 i4_resolution_id_ctr, br_ctr;
475*c83a76b0SSuyog Pawar
476*c83a76b0SSuyog Pawar ps_enc_ctxt = (enc_ctxt_t *)ps_hle_ctxt->apv_enc_hdl[i4_resolution_id];
477*c83a76b0SSuyog Pawar ps_src_prms = &ps_hle_ctxt->ps_static_cfg_prms->s_src_prms;
478*c83a76b0SSuyog Pawar i4_num_resolutions = ps_hle_ctxt->ps_static_cfg_prms->s_tgt_lyr_prms.i4_num_res_layers;
479*c83a76b0SSuyog Pawar /* set no error in the output */
480*c83a76b0SSuyog Pawar ps_hle_ctxt->i4_error_code = 0;
481*c83a76b0SSuyog Pawar
482*c83a76b0SSuyog Pawar /* ------- populate the Input buffer requirements -------- */
483*c83a76b0SSuyog Pawar /* get the number of buffers required for LAP */
484*c83a76b0SSuyog Pawar ps_input_bufs_req->i4_min_num_yuv_bufs =
485*c83a76b0SSuyog Pawar ihevce_lap_get_num_ip_bufs(&ps_enc_ctxt->s_lap_stat_prms);
486*c83a76b0SSuyog Pawar
487*c83a76b0SSuyog Pawar ps_input_bufs_req->i4_min_num_synch_ctrl_bufs = ps_input_bufs_req->i4_min_num_yuv_bufs;
488*c83a76b0SSuyog Pawar
489*c83a76b0SSuyog Pawar ps_input_bufs_req->i4_min_num_asynch_ctrl_bufs = NUM_AYSNC_CMD_BUFS;
490*c83a76b0SSuyog Pawar
491*c83a76b0SSuyog Pawar /* buffer sizes are populated based on create time parameters */
492*c83a76b0SSuyog Pawar ctb_align_pic_wd =
493*c83a76b0SSuyog Pawar ps_src_prms->i4_width +
494*c83a76b0SSuyog Pawar SET_CTB_ALIGN(ps_src_prms->i4_width, ps_enc_ctxt->s_frm_ctb_prms.i4_ctb_size);
495*c83a76b0SSuyog Pawar
496*c83a76b0SSuyog Pawar ctb_align_pic_ht =
497*c83a76b0SSuyog Pawar ps_src_prms->i4_height +
498*c83a76b0SSuyog Pawar SET_CTB_ALIGN(ps_src_prms->i4_height, ps_enc_ctxt->s_frm_ctb_prms.i4_ctb_size);
499*c83a76b0SSuyog Pawar
500*c83a76b0SSuyog Pawar if(ps_src_prms->i4_input_bit_depth > 8)
501*c83a76b0SSuyog Pawar {
502*c83a76b0SSuyog Pawar ps_input_bufs_req->i4_min_size_y_buf = ctb_align_pic_wd * ctb_align_pic_ht * 2;
503*c83a76b0SSuyog Pawar
504*c83a76b0SSuyog Pawar ps_input_bufs_req->i4_min_size_uv_buf = ps_input_bufs_req->i4_min_size_y_buf >> 1;
505*c83a76b0SSuyog Pawar }
506*c83a76b0SSuyog Pawar else
507*c83a76b0SSuyog Pawar {
508*c83a76b0SSuyog Pawar ps_input_bufs_req->i4_min_size_y_buf = ctb_align_pic_wd * ctb_align_pic_ht;
509*c83a76b0SSuyog Pawar
510*c83a76b0SSuyog Pawar ps_input_bufs_req->i4_min_size_uv_buf = (ctb_align_pic_wd * ctb_align_pic_ht) >> 1;
511*c83a76b0SSuyog Pawar }
512*c83a76b0SSuyog Pawar
513*c83a76b0SSuyog Pawar ps_input_bufs_req->i4_min_size_uv_buf <<=
514*c83a76b0SSuyog Pawar ((ps_src_prms->i4_chr_format == IV_YUV_422SP_UV) ? 1 : 0);
515*c83a76b0SSuyog Pawar
516*c83a76b0SSuyog Pawar ps_input_bufs_req->i4_yuv_format = ps_src_prms->i4_chr_format;
517*c83a76b0SSuyog Pawar
518*c83a76b0SSuyog Pawar #ifndef DISABLE_SEI
519*c83a76b0SSuyog Pawar ps_input_bufs_req->i4_min_size_synch_ctrl_bufs =
520*c83a76b0SSuyog Pawar ((MAX_SEI_PAYLOAD_PER_TLV + 16) * MAX_NUMBER_OF_SEI_PAYLOAD) + 16;
521*c83a76b0SSuyog Pawar
522*c83a76b0SSuyog Pawar ps_input_bufs_req->i4_min_size_asynch_ctrl_bufs =
523*c83a76b0SSuyog Pawar ((MAX_SEI_PAYLOAD_PER_TLV + 16) * (MAX_NUMBER_OF_SEI_PAYLOAD - 6)) + 16;
524*c83a76b0SSuyog Pawar #else
525*c83a76b0SSuyog Pawar ps_input_bufs_req->i4_min_size_synch_ctrl_bufs = 16;
526*c83a76b0SSuyog Pawar ps_input_bufs_req->i4_min_size_asynch_ctrl_bufs = 16;
527*c83a76b0SSuyog Pawar #endif
528*c83a76b0SSuyog Pawar
529*c83a76b0SSuyog Pawar for(i4_resolution_id_ctr = 0; i4_resolution_id_ctr < i4_num_resolutions; i4_resolution_id_ctr++)
530*c83a76b0SSuyog Pawar {
531*c83a76b0SSuyog Pawar ps_enc_ctxt = (enc_ctxt_t *)ps_hle_ctxt->apv_enc_hdl[i4_resolution_id_ctr];
532*c83a76b0SSuyog Pawar
533*c83a76b0SSuyog Pawar i4_num_bitrate_instances = ps_enc_ctxt->s_runtime_tgt_params.i4_num_bitrate_instances;
534*c83a76b0SSuyog Pawar
535*c83a76b0SSuyog Pawar /* buffer sizes are populated based on create time parameters */
536*c83a76b0SSuyog Pawar ctb_align_pic_wd = ps_enc_ctxt->s_runtime_tgt_params.i4_width +
537*c83a76b0SSuyog Pawar SET_CTB_ALIGN(
538*c83a76b0SSuyog Pawar ps_enc_ctxt->s_runtime_tgt_params.i4_width,
539*c83a76b0SSuyog Pawar ps_enc_ctxt->s_frm_ctb_prms.i4_ctb_size);
540*c83a76b0SSuyog Pawar
541*c83a76b0SSuyog Pawar ctb_align_pic_ht = ps_enc_ctxt->s_runtime_tgt_params.i4_height +
542*c83a76b0SSuyog Pawar SET_CTB_ALIGN(
543*c83a76b0SSuyog Pawar ps_enc_ctxt->s_runtime_tgt_params.i4_height,
544*c83a76b0SSuyog Pawar ps_enc_ctxt->s_frm_ctb_prms.i4_ctb_size);
545*c83a76b0SSuyog Pawar
546*c83a76b0SSuyog Pawar for(br_ctr = 0; br_ctr < i4_num_bitrate_instances; br_ctr++)
547*c83a76b0SSuyog Pawar {
548*c83a76b0SSuyog Pawar /* ------- populate the Output buffer requirements -------- */
549*c83a76b0SSuyog Pawar ps_res_layer_output_bufs_req->s_output_buf_req[i4_resolution_id_ctr][br_ctr]
550*c83a76b0SSuyog Pawar .i4_min_num_out_bufs = NUM_OUTPUT_BUFS;
551*c83a76b0SSuyog Pawar
552*c83a76b0SSuyog Pawar ps_res_layer_output_bufs_req->s_output_buf_req[i4_resolution_id_ctr][br_ctr]
553*c83a76b0SSuyog Pawar .i4_min_size_bitstream_buf = (ctb_align_pic_wd * ctb_align_pic_ht);
554*c83a76b0SSuyog Pawar
555*c83a76b0SSuyog Pawar if((ps_hle_ctxt->ps_static_cfg_prms->s_tgt_lyr_prms.i4_internal_bit_depth == 12) ||
556*c83a76b0SSuyog Pawar ((ps_hle_ctxt->ps_static_cfg_prms->s_tgt_lyr_prms.i4_internal_bit_depth > 8) &&
557*c83a76b0SSuyog Pawar (ps_src_prms->i4_chr_format == IV_YUV_422SP_UV)))
558*c83a76b0SSuyog Pawar {
559*c83a76b0SSuyog Pawar ps_res_layer_output_bufs_req->s_output_buf_req[i4_resolution_id_ctr][br_ctr]
560*c83a76b0SSuyog Pawar .i4_min_size_bitstream_buf *= 2;
561*c83a76b0SSuyog Pawar }
562*c83a76b0SSuyog Pawar
563*c83a76b0SSuyog Pawar if((ps_hle_ctxt->ps_static_cfg_prms->s_tgt_lyr_prms.i4_internal_bit_depth == 10) &&
564*c83a76b0SSuyog Pawar (ps_src_prms->i4_chr_format == IV_YUV_420SP_UV))
565*c83a76b0SSuyog Pawar {
566*c83a76b0SSuyog Pawar ps_res_layer_output_bufs_req->s_output_buf_req[i4_resolution_id_ctr][br_ctr]
567*c83a76b0SSuyog Pawar .i4_min_size_bitstream_buf *= 3;
568*c83a76b0SSuyog Pawar ps_res_layer_output_bufs_req->s_output_buf_req[i4_resolution_id_ctr][br_ctr]
569*c83a76b0SSuyog Pawar .i4_min_size_bitstream_buf >>= 1;
570*c83a76b0SSuyog Pawar }
571*c83a76b0SSuyog Pawar
572*c83a76b0SSuyog Pawar //recon_dump
573*c83a76b0SSuyog Pawar /* ------- populate the Recon buffer requirements -------- */
574*c83a76b0SSuyog Pawar if(ps_enc_ctxt->ps_stat_prms->i4_save_recon == 0)
575*c83a76b0SSuyog Pawar {
576*c83a76b0SSuyog Pawar ps_res_layer_recon_bufs_req->s_recon_buf_req[i4_resolution_id_ctr][br_ctr]
577*c83a76b0SSuyog Pawar .i4_min_num_recon_bufs = 0;
578*c83a76b0SSuyog Pawar
579*c83a76b0SSuyog Pawar ps_res_layer_recon_bufs_req->s_recon_buf_req[i4_resolution_id_ctr][br_ctr]
580*c83a76b0SSuyog Pawar .i4_min_size_y_buf = 0;
581*c83a76b0SSuyog Pawar
582*c83a76b0SSuyog Pawar ps_res_layer_recon_bufs_req->s_recon_buf_req[i4_resolution_id_ctr][br_ctr]
583*c83a76b0SSuyog Pawar .i4_min_size_uv_buf = 0;
584*c83a76b0SSuyog Pawar }
585*c83a76b0SSuyog Pawar else
586*c83a76b0SSuyog Pawar {
587*c83a76b0SSuyog Pawar ps_res_layer_recon_bufs_req->s_recon_buf_req[i4_resolution_id_ctr][br_ctr]
588*c83a76b0SSuyog Pawar .i4_min_num_recon_bufs = 2 * HEVCE_MAX_REF_PICS + 1;
589*c83a76b0SSuyog Pawar
590*c83a76b0SSuyog Pawar ps_res_layer_recon_bufs_req->s_recon_buf_req[i4_resolution_id_ctr][br_ctr]
591*c83a76b0SSuyog Pawar .i4_min_size_y_buf =
592*c83a76b0SSuyog Pawar ctb_align_pic_wd * ctb_align_pic_ht *
593*c83a76b0SSuyog Pawar ((ps_hle_ctxt->ps_static_cfg_prms->s_tgt_lyr_prms.i4_internal_bit_depth > 8)
594*c83a76b0SSuyog Pawar ? 2
595*c83a76b0SSuyog Pawar : 1);
596*c83a76b0SSuyog Pawar
597*c83a76b0SSuyog Pawar ps_res_layer_recon_bufs_req->s_recon_buf_req[i4_resolution_id_ctr][br_ctr]
598*c83a76b0SSuyog Pawar .i4_min_size_uv_buf =
599*c83a76b0SSuyog Pawar (ps_res_layer_recon_bufs_req->s_recon_buf_req[i4_resolution_id_ctr][br_ctr]
600*c83a76b0SSuyog Pawar .i4_min_size_y_buf >>
601*c83a76b0SSuyog Pawar 1);
602*c83a76b0SSuyog Pawar ps_res_layer_recon_bufs_req->s_recon_buf_req[i4_resolution_id_ctr][br_ctr]
603*c83a76b0SSuyog Pawar .i4_min_size_uv_buf <<=
604*c83a76b0SSuyog Pawar ((ps_src_prms->i4_chr_format == IV_YUV_422SP_UV) ? 1 : 0);
605*c83a76b0SSuyog Pawar }
606*c83a76b0SSuyog Pawar }
607*c83a76b0SSuyog Pawar }
608*c83a76b0SSuyog Pawar
609*c83a76b0SSuyog Pawar return (IV_SUCCESS);
610*c83a76b0SSuyog Pawar }
611*c83a76b0SSuyog Pawar
612*c83a76b0SSuyog Pawar /*!
613*c83a76b0SSuyog Pawar ******************************************************************************
614*c83a76b0SSuyog Pawar * \if Function name : ihevce_create_ports \endif
615*c83a76b0SSuyog Pawar *
616*c83a76b0SSuyog Pawar * \brief
617*c83a76b0SSuyog Pawar * High level Encoder IO ports Create function
618*c83a76b0SSuyog Pawar *
619*c83a76b0SSuyog Pawar * \param[in] High level encoder interface context pointer
620*c83a76b0SSuyog Pawar * \param[in] Input data buffer descriptor
621*c83a76b0SSuyog Pawar * \param[in] Input control buffer descriptor
622*c83a76b0SSuyog Pawar * \param[in] Output data buffer descriptor
623*c83a76b0SSuyog Pawar * \param[in] Output control status buffer descriptor
624*c83a76b0SSuyog Pawar * \param[out] Pointer to store the ID for Input data Que
625*c83a76b0SSuyog Pawar * \param[out] Pointer to store the ID for Input control Que
626*c83a76b0SSuyog Pawar * \param[out] Pointer to store the ID for Output data Que
627*c83a76b0SSuyog Pawar * \param[out] Pointer to store the ID for Output control status Que
628*c83a76b0SSuyog Pawar *
629*c83a76b0SSuyog Pawar * \return
630*c83a76b0SSuyog Pawar * success or fail
631*c83a76b0SSuyog Pawar *
632*c83a76b0SSuyog Pawar * \author
633*c83a76b0SSuyog Pawar * Ittiam
634*c83a76b0SSuyog Pawar *
635*c83a76b0SSuyog Pawar *****************************************************************************
636*c83a76b0SSuyog Pawar */
ihevce_create_ports(ihevce_hle_ctxt_t * ps_hle_ctxt,iv_input_data_ctrl_buffs_desc_t * ps_input_data_ctrl_buffs_desc,iv_input_asynch_ctrl_buffs_desc_t * ps_input_asynch_ctrl_buffs_desc,iv_res_layer_output_data_buffs_desc_t * ps_mres_output_data_buffs_desc,iv_res_layer_recon_data_buffs_desc_t * ps_mres_recon_data_buffs_desc)637*c83a76b0SSuyog Pawar IV_API_CALL_STATUS_T ihevce_create_ports(
638*c83a76b0SSuyog Pawar ihevce_hle_ctxt_t *ps_hle_ctxt,
639*c83a76b0SSuyog Pawar iv_input_data_ctrl_buffs_desc_t *ps_input_data_ctrl_buffs_desc,
640*c83a76b0SSuyog Pawar iv_input_asynch_ctrl_buffs_desc_t *ps_input_asynch_ctrl_buffs_desc,
641*c83a76b0SSuyog Pawar iv_res_layer_output_data_buffs_desc_t *ps_mres_output_data_buffs_desc,
642*c83a76b0SSuyog Pawar iv_res_layer_recon_data_buffs_desc_t *ps_mres_recon_data_buffs_desc)
643*c83a76b0SSuyog Pawar {
644*c83a76b0SSuyog Pawar /* local varaibles */
645*c83a76b0SSuyog Pawar enc_ctxt_t *ps_enc_ctxt;
646*c83a76b0SSuyog Pawar WORD32 res_ctr,
647*c83a76b0SSuyog Pawar i4_num_resolutions = ps_hle_ctxt->ps_static_cfg_prms->s_tgt_lyr_prms.i4_num_res_layers;
648*c83a76b0SSuyog Pawar void *pv_q_mutex_hdl = NULL;
649*c83a76b0SSuyog Pawar
650*c83a76b0SSuyog Pawar /* set no error in the output */
651*c83a76b0SSuyog Pawar ps_hle_ctxt->i4_error_code = 0;
652*c83a76b0SSuyog Pawar
653*c83a76b0SSuyog Pawar for(res_ctr = 0; res_ctr < i4_num_resolutions; res_ctr++)
654*c83a76b0SSuyog Pawar {
655*c83a76b0SSuyog Pawar ps_enc_ctxt = (enc_ctxt_t *)ps_hle_ctxt->apv_enc_hdl[res_ctr];
656*c83a76b0SSuyog Pawar /* check on buffer sizes provided by applciation needs to be checked */
657*c83a76b0SSuyog Pawar
658*c83a76b0SSuyog Pawar /* call the memory manager que init function , pass the op data , status, recon for the first bitrate, internally we will increment*/
659*c83a76b0SSuyog Pawar ihevce_mem_manager_que_init(
660*c83a76b0SSuyog Pawar ps_enc_ctxt,
661*c83a76b0SSuyog Pawar ps_hle_ctxt,
662*c83a76b0SSuyog Pawar ps_input_data_ctrl_buffs_desc,
663*c83a76b0SSuyog Pawar ps_input_asynch_ctrl_buffs_desc,
664*c83a76b0SSuyog Pawar &ps_mres_output_data_buffs_desc->s_output_data_buffs[res_ctr][0],
665*c83a76b0SSuyog Pawar &ps_mres_recon_data_buffs_desc->s_recon_data_buffs[res_ctr][0]);
666*c83a76b0SSuyog Pawar
667*c83a76b0SSuyog Pawar /* set the number of Queues */
668*c83a76b0SSuyog Pawar ps_enc_ctxt->s_enc_ques.i4_num_queues = IHEVCE_MAX_NUM_QUEUES;
669*c83a76b0SSuyog Pawar
670*c83a76b0SSuyog Pawar /* allocate a mutex to take care of handling multiple threads accesing Queues */
671*c83a76b0SSuyog Pawar /*my understanding, this is common semaphore for all the queue. Since main input is still
672*c83a76b0SSuyog Pawar common across all instance fo encoder. Hence common semaphore is a must*/
673*c83a76b0SSuyog Pawar if(0 == res_ctr)
674*c83a76b0SSuyog Pawar {
675*c83a76b0SSuyog Pawar ps_enc_ctxt->s_enc_ques.pv_q_mutex_hdl = osal_mutex_create(ps_hle_ctxt->pv_osal_handle);
676*c83a76b0SSuyog Pawar /* store it in local variable for allocating it to other instances */
677*c83a76b0SSuyog Pawar pv_q_mutex_hdl = ps_enc_ctxt->s_enc_ques.pv_q_mutex_hdl;
678*c83a76b0SSuyog Pawar if(NULL == pv_q_mutex_hdl)
679*c83a76b0SSuyog Pawar {
680*c83a76b0SSuyog Pawar return IV_FAIL;
681*c83a76b0SSuyog Pawar }
682*c83a76b0SSuyog Pawar }
683*c83a76b0SSuyog Pawar else
684*c83a76b0SSuyog Pawar {
685*c83a76b0SSuyog Pawar ps_enc_ctxt->s_enc_ques.pv_q_mutex_hdl = pv_q_mutex_hdl;
686*c83a76b0SSuyog Pawar }
687*c83a76b0SSuyog Pawar
688*c83a76b0SSuyog Pawar /* Set the i/o queues created status to 1 */
689*c83a76b0SSuyog Pawar ps_enc_ctxt->i4_io_queues_created = 1;
690*c83a76b0SSuyog Pawar }
691*c83a76b0SSuyog Pawar return (IV_SUCCESS);
692*c83a76b0SSuyog Pawar }
693*c83a76b0SSuyog Pawar
694*c83a76b0SSuyog Pawar /*!
695*c83a76b0SSuyog Pawar ******************************************************************************
696*c83a76b0SSuyog Pawar * \if Function name : ihevce_hle_interface_thrd \endif
697*c83a76b0SSuyog Pawar *
698*c83a76b0SSuyog Pawar * \brief
699*c83a76b0SSuyog Pawar * High level encoder thread interface function
700*c83a76b0SSuyog Pawar *
701*c83a76b0SSuyog Pawar * \param[in] High level interface context pointer
702*c83a76b0SSuyog Pawar *
703*c83a76b0SSuyog Pawar * \return
704*c83a76b0SSuyog Pawar * None
705*c83a76b0SSuyog Pawar *
706*c83a76b0SSuyog Pawar * \author
707*c83a76b0SSuyog Pawar * Ittiam
708*c83a76b0SSuyog Pawar *
709*c83a76b0SSuyog Pawar *****************************************************************************
710*c83a76b0SSuyog Pawar */
ihevce_hle_interface_thrd(void * pv_proc_intf_ctxt)711*c83a76b0SSuyog Pawar WORD32 ihevce_hle_interface_thrd(void *pv_proc_intf_ctxt)
712*c83a76b0SSuyog Pawar {
713*c83a76b0SSuyog Pawar /* local variables */
714*c83a76b0SSuyog Pawar WORD32 ctr, res_ctr;
715*c83a76b0SSuyog Pawar ihevce_hle_ctxt_t *ps_hle_ctxt;
716*c83a76b0SSuyog Pawar enc_ctxt_t *ps_enc_ctxt;
717*c83a76b0SSuyog Pawar /* enc ctxt to store 0th instance's params which are required by all instances */
718*c83a76b0SSuyog Pawar enc_ctxt_t *ps_enc_ctxt_base;
719*c83a76b0SSuyog Pawar void *pv_lap_sem_hdl;
720*c83a76b0SSuyog Pawar void *pv_enc_frame_process_sem_hdl;
721*c83a76b0SSuyog Pawar void *pv_pre_enc_frame_process_sem_hdl;
722*c83a76b0SSuyog Pawar void *apv_ent_coding_sem_hdl[IHEVCE_MAX_NUM_BITRATES];
723*c83a76b0SSuyog Pawar void *pv_ent_common_mres_sem_hdl = NULL;
724*c83a76b0SSuyog Pawar void *pv_out_common_mres_sem_hdl = NULL;
725*c83a76b0SSuyog Pawar
726*c83a76b0SSuyog Pawar void *pv_inp_data_sem_hdl;
727*c83a76b0SSuyog Pawar void *pv_lap_inp_data_sem_hdl;
728*c83a76b0SSuyog Pawar void *pv_preenc_inp_data_sem_hdl;
729*c83a76b0SSuyog Pawar void *pv_inp_ctrl_sem_hdl;
730*c83a76b0SSuyog Pawar void *apv_out_stream_sem_hdl[IHEVCE_MAX_NUM_BITRATES];
731*c83a76b0SSuyog Pawar void *apv_out_recon_sem_hdl[IHEVCE_MAX_NUM_BITRATES];
732*c83a76b0SSuyog Pawar void *pv_out_ctrl_sts_sem_hdl;
733*c83a76b0SSuyog Pawar
734*c83a76b0SSuyog Pawar lap_intface_t *ps_lap_interface_ctxt;
735*c83a76b0SSuyog Pawar iv_mem_rec_t s_memtab;
736*c83a76b0SSuyog Pawar WORD32 i4_num_bit_rate_instances[IHEVCE_MAX_NUM_RESOLUTIONS], i4_num_resolutions;
737*c83a76b0SSuyog Pawar WORD32 i; //loop variable
738*c83a76b0SSuyog Pawar WORD32 ai4_proc_count[MAX_NUMBER_PROC_GRPS] = { 0 }, i4_proc_grp_count;
739*c83a76b0SSuyog Pawar WORD32 i4_acc_proc_num = 0;
740*c83a76b0SSuyog Pawar
741*c83a76b0SSuyog Pawar /* Frame Encode processing threads & semaphores */
742*c83a76b0SSuyog Pawar void *apv_enc_frm_proc_hdls[IHEVCE_MAX_NUM_RESOLUTIONS][MAX_NUM_FRM_PROC_THRDS_ENC];
743*c83a76b0SSuyog Pawar frm_proc_thrd_ctxt_t
744*c83a76b0SSuyog Pawar *aps_enc_frm_proc_thrd_ctxt[IHEVCE_MAX_NUM_RESOLUTIONS][MAX_NUM_FRM_PROC_THRDS_ENC];
745*c83a76b0SSuyog Pawar
746*c83a76b0SSuyog Pawar /* Pre Frame Encode processing threads & semaphores */
747*c83a76b0SSuyog Pawar void *apv_pre_enc_frm_proc_hdls[IHEVCE_MAX_NUM_RESOLUTIONS][MAX_NUM_FRM_PROC_THRDS_PRE_ENC];
748*c83a76b0SSuyog Pawar frm_proc_thrd_ctxt_t
749*c83a76b0SSuyog Pawar *aps_pre_enc_frm_proc_thrd_ctxt[IHEVCE_MAX_NUM_RESOLUTIONS][MAX_NUM_FRM_PROC_THRDS_PRE_ENC];
750*c83a76b0SSuyog Pawar
751*c83a76b0SSuyog Pawar void *apv_entropy_thrd_hdls[IHEVCE_MAX_NUM_RESOLUTIONS][NUM_ENTROPY_THREADS];
752*c83a76b0SSuyog Pawar frm_proc_thrd_ctxt_t *aps_entropy_thrd_ctxt[IHEVCE_MAX_NUM_RESOLUTIONS][NUM_ENTROPY_THREADS];
753*c83a76b0SSuyog Pawar
754*c83a76b0SSuyog Pawar ps_hle_ctxt = (ihevce_hle_ctxt_t *)pv_proc_intf_ctxt;
755*c83a76b0SSuyog Pawar ps_enc_ctxt_base = (enc_ctxt_t *)ps_hle_ctxt->apv_enc_hdl[0];
756*c83a76b0SSuyog Pawar /* profile start */
757*c83a76b0SSuyog Pawar PROFILE_START(&ps_hle_ctxt->profile_hle);
758*c83a76b0SSuyog Pawar /* store default values of mem tab */
759*c83a76b0SSuyog Pawar s_memtab.i4_size = sizeof(iv_mem_rec_t);
760*c83a76b0SSuyog Pawar s_memtab.i4_mem_alignment = 4;
761*c83a76b0SSuyog Pawar
762*c83a76b0SSuyog Pawar i4_num_resolutions = ps_enc_ctxt_base->ps_stat_prms->s_tgt_lyr_prms.i4_num_res_layers;
763*c83a76b0SSuyog Pawar memset(
764*c83a76b0SSuyog Pawar apv_entropy_thrd_hdls,
765*c83a76b0SSuyog Pawar 0,
766*c83a76b0SSuyog Pawar IHEVCE_MAX_NUM_RESOLUTIONS * NUM_ENTROPY_THREADS * sizeof(void *));
767*c83a76b0SSuyog Pawar memset(
768*c83a76b0SSuyog Pawar apv_entropy_thrd_hdls,
769*c83a76b0SSuyog Pawar 0,
770*c83a76b0SSuyog Pawar IHEVCE_MAX_NUM_RESOLUTIONS * NUM_ENTROPY_THREADS * sizeof(void *));
771*c83a76b0SSuyog Pawar for(res_ctr = 0; res_ctr < i4_num_resolutions; res_ctr++)
772*c83a76b0SSuyog Pawar {
773*c83a76b0SSuyog Pawar i4_num_bit_rate_instances[res_ctr] =
774*c83a76b0SSuyog Pawar ps_enc_ctxt_base->ps_stat_prms->s_tgt_lyr_prms.as_tgt_params[res_ctr]
775*c83a76b0SSuyog Pawar .i4_num_bitrate_instances;
776*c83a76b0SSuyog Pawar }
777*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
778*c83a76b0SSuyog Pawar /* Init number of threads for each stage */
779*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
780*c83a76b0SSuyog Pawar
781*c83a76b0SSuyog Pawar {
782*c83a76b0SSuyog Pawar for(res_ctr = 0; res_ctr < i4_num_resolutions; res_ctr++)
783*c83a76b0SSuyog Pawar {
784*c83a76b0SSuyog Pawar ps_enc_ctxt = (enc_ctxt_t *)ps_hle_ctxt->apv_enc_hdl[res_ctr];
785*c83a76b0SSuyog Pawar /* all the threads created will be made active */
786*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.i4_num_active_enc_thrds =
787*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.i4_num_enc_proc_thrds;
788*c83a76b0SSuyog Pawar
789*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.i4_num_active_pre_enc_thrds =
790*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.i4_num_pre_enc_proc_thrds;
791*c83a76b0SSuyog Pawar }
792*c83a76b0SSuyog Pawar }
793*c83a76b0SSuyog Pawar
794*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
795*c83a76b0SSuyog Pawar /* Multiple processing Threads Semaphores init */
796*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
797*c83a76b0SSuyog Pawar for(res_ctr = 0; res_ctr < i4_num_resolutions; res_ctr++)
798*c83a76b0SSuyog Pawar {
799*c83a76b0SSuyog Pawar osal_sem_attr_t attr = OSAL_DEFAULT_SEM_ATTR;
800*c83a76b0SSuyog Pawar
801*c83a76b0SSuyog Pawar ps_enc_ctxt = (enc_ctxt_t *)ps_hle_ctxt->apv_enc_hdl[res_ctr];
802*c83a76b0SSuyog Pawar
803*c83a76b0SSuyog Pawar attr.value = SEM_START_VALUE;
804*c83a76b0SSuyog Pawar
805*c83a76b0SSuyog Pawar /* Create Semaphore handle for LAP thread */
806*c83a76b0SSuyog Pawar if(0 == ps_enc_ctxt->i4_resolution_id)
807*c83a76b0SSuyog Pawar {
808*c83a76b0SSuyog Pawar pv_lap_sem_hdl = osal_sem_create(ps_hle_ctxt->pv_osal_handle, &attr);
809*c83a76b0SSuyog Pawar if(NULL == pv_lap_sem_hdl)
810*c83a76b0SSuyog Pawar {
811*c83a76b0SSuyog Pawar return IV_FAIL;
812*c83a76b0SSuyog Pawar }
813*c83a76b0SSuyog Pawar }
814*c83a76b0SSuyog Pawar else
815*c83a76b0SSuyog Pawar {
816*c83a76b0SSuyog Pawar /*NOTE: Tile workspace assigned this to null. Confirm this*/
817*c83a76b0SSuyog Pawar pv_lap_sem_hdl = ps_enc_ctxt_base->s_thrd_sem_ctxt.pv_lap_sem_handle;
818*c83a76b0SSuyog Pawar }
819*c83a76b0SSuyog Pawar /* Create Semaphore for encode frame process thread */
820*c83a76b0SSuyog Pawar pv_enc_frame_process_sem_hdl = osal_sem_create(ps_hle_ctxt->pv_osal_handle, &attr);
821*c83a76b0SSuyog Pawar if(NULL == pv_enc_frame_process_sem_hdl)
822*c83a76b0SSuyog Pawar {
823*c83a76b0SSuyog Pawar return IV_FAIL;
824*c83a76b0SSuyog Pawar }
825*c83a76b0SSuyog Pawar
826*c83a76b0SSuyog Pawar /* Create Semaphore for pre_encode frame process thread */
827*c83a76b0SSuyog Pawar pv_pre_enc_frame_process_sem_hdl = osal_sem_create(ps_hle_ctxt->pv_osal_handle, &attr);
828*c83a76b0SSuyog Pawar if(NULL == pv_pre_enc_frame_process_sem_hdl)
829*c83a76b0SSuyog Pawar {
830*c83a76b0SSuyog Pawar return IV_FAIL;
831*c83a76b0SSuyog Pawar }
832*c83a76b0SSuyog Pawar
833*c83a76b0SSuyog Pawar /* Create Semaphore for input frame data q function */
834*c83a76b0SSuyog Pawar if(0 == ps_enc_ctxt->i4_resolution_id)
835*c83a76b0SSuyog Pawar {
836*c83a76b0SSuyog Pawar pv_inp_data_sem_hdl = osal_sem_create(ps_hle_ctxt->pv_osal_handle, &attr);
837*c83a76b0SSuyog Pawar if(NULL == pv_inp_data_sem_hdl)
838*c83a76b0SSuyog Pawar {
839*c83a76b0SSuyog Pawar return IV_FAIL;
840*c83a76b0SSuyog Pawar }
841*c83a76b0SSuyog Pawar }
842*c83a76b0SSuyog Pawar else
843*c83a76b0SSuyog Pawar {
844*c83a76b0SSuyog Pawar pv_inp_data_sem_hdl = ps_enc_ctxt_base->s_thrd_sem_ctxt.pv_inp_data_sem_handle;
845*c83a76b0SSuyog Pawar }
846*c83a76b0SSuyog Pawar
847*c83a76b0SSuyog Pawar /*creating new input queue owned by encoder*/
848*c83a76b0SSuyog Pawar /* Create Semaphore for input frame data q function */
849*c83a76b0SSuyog Pawar pv_lap_inp_data_sem_hdl = osal_sem_create(ps_hle_ctxt->pv_osal_handle, &attr);
850*c83a76b0SSuyog Pawar if(NULL == pv_lap_inp_data_sem_hdl)
851*c83a76b0SSuyog Pawar {
852*c83a76b0SSuyog Pawar return IV_FAIL;
853*c83a76b0SSuyog Pawar }
854*c83a76b0SSuyog Pawar
855*c83a76b0SSuyog Pawar /* Create Semaphore for input frame data q function */
856*c83a76b0SSuyog Pawar pv_preenc_inp_data_sem_hdl = osal_sem_create(ps_hle_ctxt->pv_osal_handle, &attr);
857*c83a76b0SSuyog Pawar if(NULL == pv_preenc_inp_data_sem_hdl)
858*c83a76b0SSuyog Pawar {
859*c83a76b0SSuyog Pawar return IV_FAIL;
860*c83a76b0SSuyog Pawar }
861*c83a76b0SSuyog Pawar
862*c83a76b0SSuyog Pawar /* Create Semaphore for input conrol data q function */
863*c83a76b0SSuyog Pawar if(0 == ps_enc_ctxt->i4_resolution_id)
864*c83a76b0SSuyog Pawar {
865*c83a76b0SSuyog Pawar pv_inp_ctrl_sem_hdl = osal_sem_create(ps_hle_ctxt->pv_osal_handle, &attr);
866*c83a76b0SSuyog Pawar if(NULL == pv_inp_ctrl_sem_hdl)
867*c83a76b0SSuyog Pawar {
868*c83a76b0SSuyog Pawar return IV_FAIL;
869*c83a76b0SSuyog Pawar }
870*c83a76b0SSuyog Pawar }
871*c83a76b0SSuyog Pawar else
872*c83a76b0SSuyog Pawar { /*Inp ctrl queue is same for all resolutions between app and lap*/
873*c83a76b0SSuyog Pawar pv_inp_ctrl_sem_hdl = ps_enc_ctxt_base->s_thrd_sem_ctxt.pv_inp_ctrl_sem_handle;
874*c83a76b0SSuyog Pawar }
875*c83a76b0SSuyog Pawar
876*c83a76b0SSuyog Pawar /* Create Semaphore for output control status data q function */
877*c83a76b0SSuyog Pawar pv_out_ctrl_sts_sem_hdl = osal_sem_create(ps_hle_ctxt->pv_osal_handle, &attr);
878*c83a76b0SSuyog Pawar if(NULL == pv_out_ctrl_sts_sem_hdl)
879*c83a76b0SSuyog Pawar {
880*c83a76b0SSuyog Pawar return IV_FAIL;
881*c83a76b0SSuyog Pawar }
882*c83a76b0SSuyog Pawar
883*c83a76b0SSuyog Pawar /* Multi res single output case singel output queue is used for all output resolutions */
884*c83a76b0SSuyog Pawar if(1 == ps_enc_ctxt_base->ps_stat_prms->s_tgt_lyr_prms.i4_mres_single_out)
885*c83a76b0SSuyog Pawar {
886*c83a76b0SSuyog Pawar ps_enc_ctxt->s_enc_ques.apv_q_hdl[IHEVCE_OUTPUT_DATA_Q] =
887*c83a76b0SSuyog Pawar ps_enc_ctxt_base->s_enc_ques.apv_q_hdl[IHEVCE_OUTPUT_DATA_Q];
888*c83a76b0SSuyog Pawar if(0 == ps_enc_ctxt->i4_resolution_id)
889*c83a76b0SSuyog Pawar {
890*c83a76b0SSuyog Pawar /* Create Semaphore for enropy coding thread */
891*c83a76b0SSuyog Pawar pv_ent_common_mres_sem_hdl = osal_sem_create(ps_hle_ctxt->pv_osal_handle, &attr);
892*c83a76b0SSuyog Pawar if(NULL == pv_ent_common_mres_sem_hdl)
893*c83a76b0SSuyog Pawar {
894*c83a76b0SSuyog Pawar return IV_FAIL;
895*c83a76b0SSuyog Pawar }
896*c83a76b0SSuyog Pawar
897*c83a76b0SSuyog Pawar /* Create Semaphore for output stream data q function */
898*c83a76b0SSuyog Pawar pv_out_common_mres_sem_hdl = osal_sem_create(ps_hle_ctxt->pv_osal_handle, &attr);
899*c83a76b0SSuyog Pawar if(NULL == pv_out_common_mres_sem_hdl)
900*c83a76b0SSuyog Pawar {
901*c83a76b0SSuyog Pawar return IV_FAIL;
902*c83a76b0SSuyog Pawar }
903*c83a76b0SSuyog Pawar }
904*c83a76b0SSuyog Pawar ps_enc_ctxt->s_thrd_sem_ctxt.pv_ent_common_mres_sem_hdl = pv_ent_common_mres_sem_hdl;
905*c83a76b0SSuyog Pawar ps_enc_ctxt->s_thrd_sem_ctxt.pv_out_common_mres_sem_hdl = pv_out_common_mres_sem_hdl;
906*c83a76b0SSuyog Pawar }
907*c83a76b0SSuyog Pawar
908*c83a76b0SSuyog Pawar /*create entropy and output semaphores for each thread.
909*c83a76b0SSuyog Pawar Each thread will correspond to each bit-rate instance running */
910*c83a76b0SSuyog Pawar for(i = 0; i < i4_num_bit_rate_instances[res_ctr]; i++)
911*c83a76b0SSuyog Pawar {
912*c83a76b0SSuyog Pawar /* Create Semaphore for enropy coding thread */
913*c83a76b0SSuyog Pawar apv_ent_coding_sem_hdl[i] = osal_sem_create(ps_hle_ctxt->pv_osal_handle, &attr);
914*c83a76b0SSuyog Pawar if(NULL == apv_ent_coding_sem_hdl[i])
915*c83a76b0SSuyog Pawar {
916*c83a76b0SSuyog Pawar return IV_FAIL;
917*c83a76b0SSuyog Pawar }
918*c83a76b0SSuyog Pawar
919*c83a76b0SSuyog Pawar /* Create Semaphore for output stream data q function */
920*c83a76b0SSuyog Pawar apv_out_stream_sem_hdl[i] = osal_sem_create(ps_hle_ctxt->pv_osal_handle, &attr);
921*c83a76b0SSuyog Pawar if(NULL == apv_out_stream_sem_hdl[i])
922*c83a76b0SSuyog Pawar {
923*c83a76b0SSuyog Pawar return IV_FAIL;
924*c83a76b0SSuyog Pawar }
925*c83a76b0SSuyog Pawar
926*c83a76b0SSuyog Pawar /* Create Semaphore for output recon data q function */
927*c83a76b0SSuyog Pawar apv_out_recon_sem_hdl[i] = osal_sem_create(ps_hle_ctxt->pv_osal_handle, &attr);
928*c83a76b0SSuyog Pawar if(NULL == apv_out_recon_sem_hdl[i])
929*c83a76b0SSuyog Pawar {
930*c83a76b0SSuyog Pawar return IV_FAIL;
931*c83a76b0SSuyog Pawar }
932*c83a76b0SSuyog Pawar }
933*c83a76b0SSuyog Pawar
934*c83a76b0SSuyog Pawar /* update the semaphore handles and the thread creates status */
935*c83a76b0SSuyog Pawar
936*c83a76b0SSuyog Pawar ps_enc_ctxt->s_thrd_sem_ctxt.pv_enc_frm_proc_sem_handle = pv_enc_frame_process_sem_hdl;
937*c83a76b0SSuyog Pawar ps_enc_ctxt->s_thrd_sem_ctxt.pv_pre_enc_frm_proc_sem_handle =
938*c83a76b0SSuyog Pawar pv_pre_enc_frame_process_sem_hdl;
939*c83a76b0SSuyog Pawar ps_enc_ctxt->s_thrd_sem_ctxt.pv_lap_sem_handle = pv_lap_sem_hdl;
940*c83a76b0SSuyog Pawar ps_enc_ctxt->s_thrd_sem_ctxt.pv_inp_data_sem_handle = pv_inp_data_sem_hdl;
941*c83a76b0SSuyog Pawar ps_enc_ctxt->s_thrd_sem_ctxt.pv_lap_inp_data_sem_hdl = pv_lap_inp_data_sem_hdl;
942*c83a76b0SSuyog Pawar ps_enc_ctxt->s_thrd_sem_ctxt.pv_preenc_inp_data_sem_hdl = pv_preenc_inp_data_sem_hdl;
943*c83a76b0SSuyog Pawar ps_enc_ctxt->s_thrd_sem_ctxt.pv_inp_ctrl_sem_handle = pv_inp_ctrl_sem_hdl;
944*c83a76b0SSuyog Pawar ps_enc_ctxt->s_thrd_sem_ctxt.pv_out_ctrl_sem_handle = pv_out_ctrl_sts_sem_hdl;
945*c83a76b0SSuyog Pawar for(i = 0; i < i4_num_bit_rate_instances[res_ctr]; i++)
946*c83a76b0SSuyog Pawar {
947*c83a76b0SSuyog Pawar ps_enc_ctxt->s_thrd_sem_ctxt.apv_ent_cod_sem_handle[i] = apv_ent_coding_sem_hdl[i];
948*c83a76b0SSuyog Pawar ps_enc_ctxt->s_thrd_sem_ctxt.apv_out_strm_sem_handle[i] = apv_out_stream_sem_hdl[i];
949*c83a76b0SSuyog Pawar ps_enc_ctxt->s_thrd_sem_ctxt.apv_out_recon_sem_handle[i] = apv_out_recon_sem_hdl[i];
950*c83a76b0SSuyog Pawar }
951*c83a76b0SSuyog Pawar }
952*c83a76b0SSuyog Pawar
953*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
954*c83a76b0SSuyog Pawar /* Multiple processing Threads Mutex init */
955*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
956*c83a76b0SSuyog Pawar for(res_ctr = 0; res_ctr < i4_num_resolutions; res_ctr++)
957*c83a76b0SSuyog Pawar {
958*c83a76b0SSuyog Pawar ps_enc_ctxt = (enc_ctxt_t *)ps_hle_ctxt->apv_enc_hdl[res_ctr];
959*c83a76b0SSuyog Pawar
960*c83a76b0SSuyog Pawar /* create a mutex lock for Job Queue access accross slave threads of encode frame processing */
961*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.pv_job_q_mutex_hdl_enc_grp_me =
962*c83a76b0SSuyog Pawar osal_mutex_create(ps_hle_ctxt->pv_osal_handle);
963*c83a76b0SSuyog Pawar if(NULL == ps_enc_ctxt->s_multi_thrd.pv_job_q_mutex_hdl_enc_grp_me)
964*c83a76b0SSuyog Pawar {
965*c83a76b0SSuyog Pawar return IV_FAIL;
966*c83a76b0SSuyog Pawar }
967*c83a76b0SSuyog Pawar
968*c83a76b0SSuyog Pawar /* create a mutex lock for Job Queue access accross slave threads of encode frame processing */
969*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.pv_job_q_mutex_hdl_enc_grp_enc_loop =
970*c83a76b0SSuyog Pawar osal_mutex_create(ps_hle_ctxt->pv_osal_handle);
971*c83a76b0SSuyog Pawar if(NULL == ps_enc_ctxt->s_multi_thrd.pv_job_q_mutex_hdl_enc_grp_enc_loop)
972*c83a76b0SSuyog Pawar {
973*c83a76b0SSuyog Pawar return IV_FAIL;
974*c83a76b0SSuyog Pawar }
975*c83a76b0SSuyog Pawar
976*c83a76b0SSuyog Pawar /* create mutex for enc thread group */
977*c83a76b0SSuyog Pawar for(i = 0; i < MAX_NUM_ME_PARALLEL; i++)
978*c83a76b0SSuyog Pawar {
979*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.apv_mutex_handle[i] =
980*c83a76b0SSuyog Pawar osal_mutex_create(ps_hle_ctxt->pv_osal_handle);
981*c83a76b0SSuyog Pawar if(NULL == ps_enc_ctxt->s_multi_thrd.apv_mutex_handle[i])
982*c83a76b0SSuyog Pawar {
983*c83a76b0SSuyog Pawar return IV_FAIL;
984*c83a76b0SSuyog Pawar }
985*c83a76b0SSuyog Pawar
986*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.apv_mutex_handle_me_end[i] =
987*c83a76b0SSuyog Pawar osal_mutex_create(ps_hle_ctxt->pv_osal_handle);
988*c83a76b0SSuyog Pawar if(NULL == ps_enc_ctxt->s_multi_thrd.apv_mutex_handle_me_end[i])
989*c83a76b0SSuyog Pawar {
990*c83a76b0SSuyog Pawar return IV_FAIL;
991*c83a76b0SSuyog Pawar }
992*c83a76b0SSuyog Pawar }
993*c83a76b0SSuyog Pawar
994*c83a76b0SSuyog Pawar for(i = 0; i < MAX_NUM_ENC_LOOP_PARALLEL; i++)
995*c83a76b0SSuyog Pawar {
996*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.apv_post_enc_mutex_handle[i] =
997*c83a76b0SSuyog Pawar osal_mutex_create(ps_hle_ctxt->pv_osal_handle);
998*c83a76b0SSuyog Pawar if(NULL == ps_enc_ctxt->s_multi_thrd.apv_post_enc_mutex_handle[i])
999*c83a76b0SSuyog Pawar {
1000*c83a76b0SSuyog Pawar return IV_FAIL;
1001*c83a76b0SSuyog Pawar }
1002*c83a76b0SSuyog Pawar
1003*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.apv_mutex_handle_frame_init[i] =
1004*c83a76b0SSuyog Pawar osal_mutex_create(ps_hle_ctxt->pv_osal_handle);
1005*c83a76b0SSuyog Pawar if(NULL == ps_enc_ctxt->s_multi_thrd.apv_mutex_handle_frame_init[i])
1006*c83a76b0SSuyog Pawar {
1007*c83a76b0SSuyog Pawar return IV_FAIL;
1008*c83a76b0SSuyog Pawar }
1009*c83a76b0SSuyog Pawar }
1010*c83a76b0SSuyog Pawar
1011*c83a76b0SSuyog Pawar /*initialize mutex for pre-enc group */
1012*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.pv_mutex_hdl_pre_enc_init =
1013*c83a76b0SSuyog Pawar osal_mutex_create(ps_hle_ctxt->pv_osal_handle);
1014*c83a76b0SSuyog Pawar
1015*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.pv_mutex_hdl_pre_enc_decomp_deinit =
1016*c83a76b0SSuyog Pawar osal_mutex_create(ps_hle_ctxt->pv_osal_handle);
1017*c83a76b0SSuyog Pawar
1018*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.pv_mutex_hdl_pre_enc_hme_init =
1019*c83a76b0SSuyog Pawar osal_mutex_create(ps_hle_ctxt->pv_osal_handle);
1020*c83a76b0SSuyog Pawar
1021*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.pv_mutex_hdl_pre_enc_hme_deinit =
1022*c83a76b0SSuyog Pawar osal_mutex_create(ps_hle_ctxt->pv_osal_handle);
1023*c83a76b0SSuyog Pawar
1024*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.pv_mutex_hdl_pre_enc_deinit =
1025*c83a76b0SSuyog Pawar osal_mutex_create(ps_hle_ctxt->pv_osal_handle);
1026*c83a76b0SSuyog Pawar
1027*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.pv_mutex_hdl_l0_ipe_init =
1028*c83a76b0SSuyog Pawar osal_mutex_create(ps_hle_ctxt->pv_osal_handle);
1029*c83a76b0SSuyog Pawar
1030*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.pv_job_q_mutex_hdl_pre_enc_decomp =
1031*c83a76b0SSuyog Pawar osal_mutex_create(ps_hle_ctxt->pv_osal_handle);
1032*c83a76b0SSuyog Pawar
1033*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.pv_job_q_mutex_hdl_pre_enc_hme =
1034*c83a76b0SSuyog Pawar osal_mutex_create(ps_hle_ctxt->pv_osal_handle);
1035*c83a76b0SSuyog Pawar
1036*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.pv_job_q_mutex_hdl_pre_enc_l0ipe =
1037*c83a76b0SSuyog Pawar osal_mutex_create(ps_hle_ctxt->pv_osal_handle);
1038*c83a76b0SSuyog Pawar
1039*c83a76b0SSuyog Pawar if(NULL == ps_enc_ctxt->s_multi_thrd.pv_mutex_hdl_pre_enc_init ||
1040*c83a76b0SSuyog Pawar NULL == ps_enc_ctxt->s_multi_thrd.pv_mutex_hdl_pre_enc_decomp_deinit ||
1041*c83a76b0SSuyog Pawar NULL == ps_enc_ctxt->s_multi_thrd.pv_mutex_hdl_pre_enc_hme_init ||
1042*c83a76b0SSuyog Pawar NULL == ps_enc_ctxt->s_multi_thrd.pv_mutex_hdl_pre_enc_hme_deinit ||
1043*c83a76b0SSuyog Pawar NULL == ps_enc_ctxt->s_multi_thrd.pv_mutex_hdl_pre_enc_deinit ||
1044*c83a76b0SSuyog Pawar NULL == ps_enc_ctxt->s_multi_thrd.pv_mutex_hdl_l0_ipe_init ||
1045*c83a76b0SSuyog Pawar NULL == ps_enc_ctxt->s_multi_thrd.pv_job_q_mutex_hdl_pre_enc_decomp ||
1046*c83a76b0SSuyog Pawar NULL == ps_enc_ctxt->s_multi_thrd.pv_job_q_mutex_hdl_pre_enc_hme ||
1047*c83a76b0SSuyog Pawar NULL == ps_enc_ctxt->s_multi_thrd.pv_job_q_mutex_hdl_pre_enc_l0ipe)
1048*c83a76b0SSuyog Pawar {
1049*c83a76b0SSuyog Pawar return IV_FAIL;
1050*c83a76b0SSuyog Pawar }
1051*c83a76b0SSuyog Pawar }
1052*c83a76b0SSuyog Pawar
1053*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
1054*c83a76b0SSuyog Pawar /* Multiple processing Threads Context init */
1055*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
1056*c83a76b0SSuyog Pawar
1057*c83a76b0SSuyog Pawar for(res_ctr = 0; res_ctr < i4_num_resolutions; res_ctr++)
1058*c83a76b0SSuyog Pawar {
1059*c83a76b0SSuyog Pawar ps_enc_ctxt = (enc_ctxt_t *)ps_hle_ctxt->apv_enc_hdl[res_ctr];
1060*c83a76b0SSuyog Pawar ps_enc_ctxt_base = (enc_ctxt_t *)ps_hle_ctxt->apv_enc_hdl[0];
1061*c83a76b0SSuyog Pawar
1062*c83a76b0SSuyog Pawar /*initialize multi-thread context for enc group*/
1063*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.i4_is_recon_free_done = 0;
1064*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.i4_idx_dvsr_p = 0;
1065*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.i4_last_inp_buf = 0;
1066*c83a76b0SSuyog Pawar
1067*c83a76b0SSuyog Pawar {
1068*c83a76b0SSuyog Pawar /* For all the ME frames in Parallel */
1069*c83a76b0SSuyog Pawar WORD32 i4_frm_idx;
1070*c83a76b0SSuyog Pawar
1071*c83a76b0SSuyog Pawar for(i4_frm_idx = 0; i4_frm_idx < MAX_NUM_ME_PARALLEL; i4_frm_idx++)
1072*c83a76b0SSuyog Pawar {
1073*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.me_num_thrds_exited[i4_frm_idx] = 0;
1074*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.ai4_me_master_done_flag[i4_frm_idx] = 0;
1075*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.ai4_me_enc_buff_prod_flag[i4_frm_idx] = 0;
1076*c83a76b0SSuyog Pawar }
1077*c83a76b0SSuyog Pawar }
1078*c83a76b0SSuyog Pawar
1079*c83a76b0SSuyog Pawar {
1080*c83a76b0SSuyog Pawar WORD32 i4_frm_idx;
1081*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.num_thrds_done = 0;
1082*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.num_thrds_exited_for_reenc = 0;
1083*c83a76b0SSuyog Pawar for(i4_frm_idx = 0; i4_frm_idx < MAX_NUM_ENC_LOOP_PARALLEL; i4_frm_idx++)
1084*c83a76b0SSuyog Pawar {
1085*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.num_thrds_exited[i4_frm_idx] = 0;
1086*c83a76b0SSuyog Pawar
1087*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.enc_master_done_frame_init[i4_frm_idx] = 0;
1088*c83a76b0SSuyog Pawar
1089*c83a76b0SSuyog Pawar for(i = 0; i < i4_num_bit_rate_instances[res_ctr]; i++)
1090*c83a76b0SSuyog Pawar {
1091*c83a76b0SSuyog Pawar /*reset the entropy buffer produced status */
1092*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.ai4_produce_outbuf[i4_frm_idx][i] = 1;
1093*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.ps_frm_recon[i4_frm_idx][i] = NULL;
1094*c83a76b0SSuyog Pawar
1095*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.ps_curr_out_enc_grp[i4_frm_idx][i] = NULL;
1096*c83a76b0SSuyog Pawar }
1097*c83a76b0SSuyog Pawar }
1098*c83a76b0SSuyog Pawar }
1099*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.i4_seq_mode_enabled_flag = 0;
1100*c83a76b0SSuyog Pawar
1101*c83a76b0SSuyog Pawar /* Set prev_frame_done = 1 to indicate that all the threads are in same frame*/
1102*c83a76b0SSuyog Pawar for(i = 0; i < ps_enc_ctxt->s_multi_thrd.i4_num_enc_loop_frm_pllel; i++)
1103*c83a76b0SSuyog Pawar {
1104*c83a76b0SSuyog Pawar ihevce_dmgr_set_done_frm_frm_sync(
1105*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.apv_dep_mngr_prev_frame_done[i]);
1106*c83a76b0SSuyog Pawar }
1107*c83a76b0SSuyog Pawar /* Set prev_frame_done = 1 to indicate that all the threads are in same frame*/
1108*c83a76b0SSuyog Pawar ihevce_dmgr_set_done_frm_frm_sync(
1109*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.pv_dep_mngr_prev_frame_enc_done_for_reenc);
1110*c83a76b0SSuyog Pawar /*to enable the dependency manager to wait when first reached*/
1111*c83a76b0SSuyog Pawar ihevce_dmgr_set_prev_done_frm_frm_sync(
1112*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.pv_dep_mngr_prev_frame_enc_done_for_reenc);
1113*c83a76b0SSuyog Pawar for(i = 0; i < ps_enc_ctxt->s_multi_thrd.i4_num_me_frm_pllel; i++)
1114*c83a76b0SSuyog Pawar {
1115*c83a76b0SSuyog Pawar ihevce_dmgr_set_done_frm_frm_sync(
1116*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.apv_dep_mngr_prev_frame_me_done[i]);
1117*c83a76b0SSuyog Pawar }
1118*c83a76b0SSuyog Pawar
1119*c83a76b0SSuyog Pawar /* initialize multi-thread context for pre enc group */
1120*c83a76b0SSuyog Pawar
1121*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.i4_ctrl_blocking_mode = BUFF_QUE_BLOCKING_MODE;
1122*c83a76b0SSuyog Pawar
1123*c83a76b0SSuyog Pawar for(ctr = 0; ctr < MAX_PRE_ENC_STAGGER + NUM_BUFS_DECOMP_HME; ctr++)
1124*c83a76b0SSuyog Pawar {
1125*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.ai4_pre_enc_init_done[ctr] = 0;
1126*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.ai4_pre_enc_hme_init_done[ctr] = 0;
1127*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.ai4_pre_enc_deinit_done[ctr] = 1;
1128*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.ai4_num_thrds_processed_decomp[ctr] = 0;
1129*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.ai4_num_thrds_processed_coarse_me[ctr] = 0;
1130*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.ai4_num_thrds_processed_pre_enc[ctr] = 0;
1131*c83a76b0SSuyog Pawar
1132*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.ai4_num_thrds_processed_L0_ipe_qp_init[ctr] = 0;
1133*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.ai4_decomp_coarse_me_complete_flag[ctr] = 1;
1134*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.ai4_end_flag_pre_enc[ctr] = 0;
1135*c83a76b0SSuyog Pawar }
1136*c83a76b0SSuyog Pawar
1137*c83a76b0SSuyog Pawar /* Set prev_frame_done = 1 to indicate that all the threads are in same frame*/
1138*c83a76b0SSuyog Pawar ihevce_dmgr_set_done_frm_frm_sync(
1139*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.pv_dep_mngr_prev_frame_pre_enc_l1);
1140*c83a76b0SSuyog Pawar
1141*c83a76b0SSuyog Pawar ihevce_dmgr_set_done_frm_frm_sync(
1142*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.pv_dep_mngr_prev_frame_pre_enc_coarse_me);
1143*c83a76b0SSuyog Pawar
1144*c83a76b0SSuyog Pawar ihevce_dmgr_set_done_frm_frm_sync(
1145*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.pv_dep_mngr_prev_frame_pre_enc_l0);
1146*c83a76b0SSuyog Pawar
1147*c83a76b0SSuyog Pawar {
1148*c83a76b0SSuyog Pawar /**init idx for handling delay between pre-me and l0-ipe*/
1149*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.i4_delay_pre_me_btw_l0_ipe = 0;
1150*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.i4_max_delay_pre_me_btw_l0_ipe =
1151*c83a76b0SSuyog Pawar MIN_L1_L0_STAGGER_NON_SEQ +
1152*c83a76b0SSuyog Pawar ps_enc_ctxt->s_lap_stat_prms.s_lap_params.i4_rc_look_ahead_pics + 1;
1153*c83a76b0SSuyog Pawar if(ps_enc_ctxt->s_lap_stat_prms.s_lap_params.i4_rc_look_ahead_pics)
1154*c83a76b0SSuyog Pawar {
1155*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.i4_delay_pre_me_btw_l0_ipe =
1156*c83a76b0SSuyog Pawar MIN_L1_L0_STAGGER_NON_SEQ +
1157*c83a76b0SSuyog Pawar ps_enc_ctxt->s_lap_stat_prms.s_lap_params.i4_rc_look_ahead_pics;
1158*c83a76b0SSuyog Pawar }
1159*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.i4_qp_update_l0_ipe = -1;
1160*c83a76b0SSuyog Pawar }
1161*c83a76b0SSuyog Pawar }
1162*c83a76b0SSuyog Pawar
1163*c83a76b0SSuyog Pawar /** Get Number of Processor Groups **/
1164*c83a76b0SSuyog Pawar i4_proc_grp_count = ps_enc_ctxt_base->ps_stat_prms->s_multi_thrd_prms.i4_num_proc_groups;
1165*c83a76b0SSuyog Pawar /*** Enc threads are allocated based on the assumption that there can be only 2 processor groups **/
1166*c83a76b0SSuyog Pawar ASSERT(i4_proc_grp_count <= MAX_NUMBER_PROC_GRPS);
1167*c83a76b0SSuyog Pawar /** Get Number of logical processors in Each Group **/
1168*c83a76b0SSuyog Pawar for(ctr = 0; ctr < i4_proc_grp_count; ctr++)
1169*c83a76b0SSuyog Pawar {
1170*c83a76b0SSuyog Pawar ai4_proc_count[ctr] =
1171*c83a76b0SSuyog Pawar ps_enc_ctxt_base->ps_stat_prms->s_multi_thrd_prms.ai4_num_cores_per_grp[ctr];
1172*c83a76b0SSuyog Pawar }
1173*c83a76b0SSuyog Pawar
1174*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
1175*c83a76b0SSuyog Pawar /* Create a LAP thread */
1176*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
1177*c83a76b0SSuyog Pawar /* LAP thread will run on 0th resolution instance context */
1178*c83a76b0SSuyog Pawar {
1179*c83a76b0SSuyog Pawar s_memtab.e_mem_type = IV_EXT_CACHEABLE_NORMAL_MEM;
1180*c83a76b0SSuyog Pawar s_memtab.i4_mem_size = sizeof(lap_intface_t);
1181*c83a76b0SSuyog Pawar
1182*c83a76b0SSuyog Pawar /* initialise the interface strucure parameters */
1183*c83a76b0SSuyog Pawar ps_hle_ctxt->ihevce_mem_alloc(
1184*c83a76b0SSuyog Pawar ps_hle_ctxt->pv_mem_mgr_hdl, &ps_enc_ctxt_base->ps_stat_prms->s_sys_api, &s_memtab);
1185*c83a76b0SSuyog Pawar if(s_memtab.pv_base == NULL)
1186*c83a76b0SSuyog Pawar {
1187*c83a76b0SSuyog Pawar return (IV_FAIL);
1188*c83a76b0SSuyog Pawar }
1189*c83a76b0SSuyog Pawar
1190*c83a76b0SSuyog Pawar ps_lap_interface_ctxt = (lap_intface_t *)s_memtab.pv_base;
1191*c83a76b0SSuyog Pawar
1192*c83a76b0SSuyog Pawar /* populate the params */
1193*c83a76b0SSuyog Pawar ps_lap_interface_ctxt->pv_hle_ctxt = ps_hle_ctxt;
1194*c83a76b0SSuyog Pawar ps_enc_ctxt = (enc_ctxt_t *)ps_hle_ctxt->apv_enc_hdl[0];
1195*c83a76b0SSuyog Pawar ps_lap_interface_ctxt->pv_lap_module_ctxt = ps_enc_ctxt->s_module_ctxt.pv_lap_ctxt;
1196*c83a76b0SSuyog Pawar ps_lap_interface_ctxt->i4_ctrl_in_que_id = IHEVCE_INPUT_ASYNCH_CTRL_Q;
1197*c83a76b0SSuyog Pawar ps_lap_interface_ctxt->i4_ctrl_out_que_id = IHEVCE_OUTPUT_STATUS_Q;
1198*c83a76b0SSuyog Pawar ps_lap_interface_ctxt->i4_ctrl_cmd_buf_size = ENC_COMMAND_BUFF_SIZE;
1199*c83a76b0SSuyog Pawar ps_lap_interface_ctxt->i4_ctrl_in_que_blocking_mode = BUFF_QUE_BLOCKING_MODE;
1200*c83a76b0SSuyog Pawar ps_lap_interface_ctxt->ps_sys_api = &ps_enc_ctxt_base->ps_stat_prms->s_sys_api;
1201*c83a76b0SSuyog Pawar ps_enc_ctxt_base->pv_lap_interface_ctxt = (void *)ps_lap_interface_ctxt;
1202*c83a76b0SSuyog Pawar ps_lap_interface_ctxt->ihevce_dyn_bitrate_cb = ihevce_dyn_bitrate;
1203*c83a76b0SSuyog Pawar }
1204*c83a76b0SSuyog Pawar
1205*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
1206*c83a76b0SSuyog Pawar /* Create Entropy Coding threads */
1207*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
1208*c83a76b0SSuyog Pawar /*Create entropy thread for each encoder instance*/
1209*c83a76b0SSuyog Pawar for(res_ctr = 0; res_ctr < i4_num_resolutions; res_ctr++)
1210*c83a76b0SSuyog Pawar {
1211*c83a76b0SSuyog Pawar osal_thread_attr_t s_thread_attr = OSAL_DEFAULT_THREAD_ATTR;
1212*c83a76b0SSuyog Pawar WORD32 i4_num_entropy_threads;
1213*c83a76b0SSuyog Pawar
1214*c83a76b0SSuyog Pawar /* derive encoder ctxt from hle handle */
1215*c83a76b0SSuyog Pawar ps_enc_ctxt = (enc_ctxt_t *)ps_hle_ctxt->apv_enc_hdl[res_ctr];
1216*c83a76b0SSuyog Pawar
1217*c83a76b0SSuyog Pawar i4_num_entropy_threads =
1218*c83a76b0SSuyog Pawar ps_enc_ctxt_base->ps_stat_prms->s_tgt_lyr_prms.as_tgt_params[res_ctr]
1219*c83a76b0SSuyog Pawar .i4_num_bitrate_instances;
1220*c83a76b0SSuyog Pawar
1221*c83a76b0SSuyog Pawar /* initialise the interface strucure parameters */
1222*c83a76b0SSuyog Pawar for(ctr = 0; ctr < i4_num_entropy_threads; ctr++)
1223*c83a76b0SSuyog Pawar {
1224*c83a76b0SSuyog Pawar s_memtab.e_mem_type = IV_EXT_CACHEABLE_NORMAL_MEM;
1225*c83a76b0SSuyog Pawar s_memtab.i4_mem_size = sizeof(frm_proc_thrd_ctxt_t);
1226*c83a76b0SSuyog Pawar
1227*c83a76b0SSuyog Pawar ps_hle_ctxt->ihevce_mem_alloc(
1228*c83a76b0SSuyog Pawar ps_hle_ctxt->pv_mem_mgr_hdl, &ps_enc_ctxt_base->ps_stat_prms->s_sys_api, &s_memtab);
1229*c83a76b0SSuyog Pawar if(s_memtab.pv_base == NULL)
1230*c83a76b0SSuyog Pawar {
1231*c83a76b0SSuyog Pawar return (IV_FAIL);
1232*c83a76b0SSuyog Pawar }
1233*c83a76b0SSuyog Pawar
1234*c83a76b0SSuyog Pawar aps_entropy_thrd_ctxt[res_ctr][ctr] = (frm_proc_thrd_ctxt_t *)s_memtab.pv_base;
1235*c83a76b0SSuyog Pawar
1236*c83a76b0SSuyog Pawar /* initialise the interface strucure parameters */
1237*c83a76b0SSuyog Pawar aps_entropy_thrd_ctxt[res_ctr][ctr]->i4_thrd_id = ctr;
1238*c83a76b0SSuyog Pawar aps_entropy_thrd_ctxt[res_ctr][ctr]->ps_hle_ctxt = ps_hle_ctxt;
1239*c83a76b0SSuyog Pawar aps_entropy_thrd_ctxt[res_ctr][ctr]->pv_enc_ctxt = (void *)ps_enc_ctxt;
1240*c83a76b0SSuyog Pawar
1241*c83a76b0SSuyog Pawar /* Initialize application thread attributes */
1242*c83a76b0SSuyog Pawar s_thread_attr.exit_code = 0;
1243*c83a76b0SSuyog Pawar s_thread_attr.name = 0;
1244*c83a76b0SSuyog Pawar s_thread_attr.priority_map_flag = 1;
1245*c83a76b0SSuyog Pawar s_thread_attr.priority = OSAL_PRIORITY_DEFAULT;
1246*c83a76b0SSuyog Pawar s_thread_attr.stack_addr = 0;
1247*c83a76b0SSuyog Pawar s_thread_attr.stack_size = THREAD_STACK_SIZE;
1248*c83a76b0SSuyog Pawar s_thread_attr.thread_func = ihevce_ent_coding_thrd;
1249*c83a76b0SSuyog Pawar s_thread_attr.thread_param =
1250*c83a76b0SSuyog Pawar (void *)(aps_entropy_thrd_ctxt[res_ctr]
1251*c83a76b0SSuyog Pawar [ctr]); //encioder and hle context are derived from this
1252*c83a76b0SSuyog Pawar s_thread_attr.core_affinity_mask = 0;
1253*c83a76b0SSuyog Pawar if(ps_enc_ctxt_base->ps_stat_prms->s_multi_thrd_prms.i4_num_proc_groups > 1)
1254*c83a76b0SSuyog Pawar {
1255*c83a76b0SSuyog Pawar /* Run ENTROPY thread on last group if there are more than one processor group */
1256*c83a76b0SSuyog Pawar s_thread_attr.group_num =
1257*c83a76b0SSuyog Pawar ps_hle_ctxt->ps_static_cfg_prms->s_multi_thrd_prms.i4_num_proc_groups - 1;
1258*c83a76b0SSuyog Pawar }
1259*c83a76b0SSuyog Pawar else
1260*c83a76b0SSuyog Pawar {
1261*c83a76b0SSuyog Pawar s_thread_attr.group_num = 0;
1262*c83a76b0SSuyog Pawar }
1263*c83a76b0SSuyog Pawar
1264*c83a76b0SSuyog Pawar /* Create entropy coding thread */
1265*c83a76b0SSuyog Pawar apv_entropy_thrd_hdls[res_ctr][ctr] =
1266*c83a76b0SSuyog Pawar osal_thread_create(ps_hle_ctxt->pv_osal_handle, &s_thread_attr);
1267*c83a76b0SSuyog Pawar if(NULL == apv_entropy_thrd_hdls[res_ctr][ctr])
1268*c83a76b0SSuyog Pawar {
1269*c83a76b0SSuyog Pawar return IV_FAIL;
1270*c83a76b0SSuyog Pawar }
1271*c83a76b0SSuyog Pawar }
1272*c83a76b0SSuyog Pawar }
1273*c83a76b0SSuyog Pawar
1274*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
1275*c83a76b0SSuyog Pawar /* Create all Slave Encode Frame processing threads */
1276*c83a76b0SSuyog Pawar /* - -------------------------------------------------------------------- */
1277*c83a76b0SSuyog Pawar for(res_ctr = 0; res_ctr < i4_num_resolutions; res_ctr++)
1278*c83a76b0SSuyog Pawar {
1279*c83a76b0SSuyog Pawar WORD32 enc_ctr = 0;
1280*c83a76b0SSuyog Pawar WORD32 i4_loop_count;
1281*c83a76b0SSuyog Pawar WORD32 i4_curr_grp_num = 0;
1282*c83a76b0SSuyog Pawar ps_enc_ctxt = (enc_ctxt_t *)ps_hle_ctxt->apv_enc_hdl[res_ctr];
1283*c83a76b0SSuyog Pawar
1284*c83a76b0SSuyog Pawar i4_acc_proc_num = 0;
1285*c83a76b0SSuyog Pawar /* Calculate the start core number of enc threads for current resolution */
1286*c83a76b0SSuyog Pawar for(i4_loop_count = 0; i4_loop_count < res_ctr; i4_loop_count++)
1287*c83a76b0SSuyog Pawar {
1288*c83a76b0SSuyog Pawar /* Add number of cores taken by each resolution till the curr resolution */
1289*c83a76b0SSuyog Pawar enc_ctr += ps_hle_ctxt->ai4_num_core_per_res[i4_loop_count];
1290*c83a76b0SSuyog Pawar }
1291*c83a76b0SSuyog Pawar if(ps_enc_ctxt_base->ps_stat_prms->s_multi_thrd_prms.i4_num_proc_groups > 1)
1292*c83a76b0SSuyog Pawar {
1293*c83a76b0SSuyog Pawar /* Select the group number for each res based on processors present in each group */
1294*c83a76b0SSuyog Pawar for(i4_loop_count = 0;
1295*c83a76b0SSuyog Pawar i4_loop_count <
1296*c83a76b0SSuyog Pawar ps_enc_ctxt_base->ps_stat_prms->s_multi_thrd_prms.i4_num_proc_groups;
1297*c83a76b0SSuyog Pawar i4_loop_count++)
1298*c83a76b0SSuyog Pawar {
1299*c83a76b0SSuyog Pawar i4_acc_proc_num += ai4_proc_count[i4_loop_count];
1300*c83a76b0SSuyog Pawar if(enc_ctr >= i4_acc_proc_num)
1301*c83a76b0SSuyog Pawar {
1302*c83a76b0SSuyog Pawar /* if enc_ctr is greater than proc count for first group,
1303*c83a76b0SSuyog Pawar then increment group count.This group number will be starting grp num for
1304*c83a76b0SSuyog Pawar that resolution */
1305*c83a76b0SSuyog Pawar i4_curr_grp_num++;
1306*c83a76b0SSuyog Pawar }
1307*c83a76b0SSuyog Pawar else
1308*c83a76b0SSuyog Pawar break;
1309*c83a76b0SSuyog Pawar }
1310*c83a76b0SSuyog Pawar }
1311*c83a76b0SSuyog Pawar
1312*c83a76b0SSuyog Pawar for(ctr = 0; ctr < ps_enc_ctxt->s_multi_thrd.i4_num_enc_proc_thrds; ctr++)
1313*c83a76b0SSuyog Pawar {
1314*c83a76b0SSuyog Pawar osal_thread_attr_t s_thread_attr = OSAL_DEFAULT_THREAD_ATTR;
1315*c83a76b0SSuyog Pawar
1316*c83a76b0SSuyog Pawar s_memtab.e_mem_type = IV_EXT_CACHEABLE_NORMAL_MEM;
1317*c83a76b0SSuyog Pawar s_memtab.i4_mem_size = sizeof(frm_proc_thrd_ctxt_t);
1318*c83a76b0SSuyog Pawar
1319*c83a76b0SSuyog Pawar ps_hle_ctxt->ihevce_mem_alloc(
1320*c83a76b0SSuyog Pawar ps_hle_ctxt->pv_mem_mgr_hdl, &ps_enc_ctxt_base->ps_stat_prms->s_sys_api, &s_memtab);
1321*c83a76b0SSuyog Pawar if(s_memtab.pv_base == NULL)
1322*c83a76b0SSuyog Pawar {
1323*c83a76b0SSuyog Pawar return (IV_FAIL);
1324*c83a76b0SSuyog Pawar }
1325*c83a76b0SSuyog Pawar
1326*c83a76b0SSuyog Pawar aps_enc_frm_proc_thrd_ctxt[res_ctr][ctr] = (frm_proc_thrd_ctxt_t *)s_memtab.pv_base;
1327*c83a76b0SSuyog Pawar
1328*c83a76b0SSuyog Pawar /* initialise the interface strucure parameters */
1329*c83a76b0SSuyog Pawar aps_enc_frm_proc_thrd_ctxt[res_ctr][ctr]->i4_thrd_id = ctr;
1330*c83a76b0SSuyog Pawar
1331*c83a76b0SSuyog Pawar aps_enc_frm_proc_thrd_ctxt[res_ctr][ctr]->ps_hle_ctxt = ps_hle_ctxt;
1332*c83a76b0SSuyog Pawar
1333*c83a76b0SSuyog Pawar ps_enc_ctxt = (enc_ctxt_t *)ps_hle_ctxt->apv_enc_hdl[res_ctr];
1334*c83a76b0SSuyog Pawar
1335*c83a76b0SSuyog Pawar aps_enc_frm_proc_thrd_ctxt[res_ctr][ctr]->pv_enc_ctxt = (void *)ps_enc_ctxt;
1336*c83a76b0SSuyog Pawar
1337*c83a76b0SSuyog Pawar /* Initialize application thread attributes */
1338*c83a76b0SSuyog Pawar s_thread_attr.exit_code = 0;
1339*c83a76b0SSuyog Pawar s_thread_attr.name = 0;
1340*c83a76b0SSuyog Pawar s_thread_attr.priority_map_flag = 1;
1341*c83a76b0SSuyog Pawar s_thread_attr.priority = OSAL_PRIORITY_DEFAULT;
1342*c83a76b0SSuyog Pawar s_thread_attr.stack_addr = 0;
1343*c83a76b0SSuyog Pawar s_thread_attr.stack_size = THREAD_STACK_SIZE;
1344*c83a76b0SSuyog Pawar s_thread_attr.thread_func = ihevce_enc_frm_proc_slave_thrd;
1345*c83a76b0SSuyog Pawar s_thread_attr.thread_param = (void *)(aps_enc_frm_proc_thrd_ctxt[res_ctr][ctr]);
1346*c83a76b0SSuyog Pawar s_thread_attr.group_num = i4_curr_grp_num;
1347*c83a76b0SSuyog Pawar if(1 == ps_enc_ctxt_base->ps_stat_prms->s_multi_thrd_prms.i4_use_thrd_affinity)
1348*c83a76b0SSuyog Pawar {
1349*c83a76b0SSuyog Pawar ihevce_static_multi_thread_params_t *ps_multi_thrd_prms =
1350*c83a76b0SSuyog Pawar &ps_enc_ctxt_base->ps_stat_prms->s_multi_thrd_prms;
1351*c83a76b0SSuyog Pawar
1352*c83a76b0SSuyog Pawar s_thread_attr.core_affinity_mask = ps_multi_thrd_prms->au8_core_aff_mask[enc_ctr];
1353*c83a76b0SSuyog Pawar if((enc_ctr >= i4_acc_proc_num) &&
1354*c83a76b0SSuyog Pawar (ps_enc_ctxt_base->ps_stat_prms->s_multi_thrd_prms.i4_num_proc_groups > 1))
1355*c83a76b0SSuyog Pawar {
1356*c83a76b0SSuyog Pawar /*** When the cores in the Group0 is exhausted start enc threads in the next Processor Group ***/
1357*c83a76b0SSuyog Pawar s_thread_attr.group_num++;
1358*c83a76b0SSuyog Pawar i4_curr_grp_num++;
1359*c83a76b0SSuyog Pawar /* This takes care of the condition that differnt proc groups can have diff number of cores */
1360*c83a76b0SSuyog Pawar i4_acc_proc_num += ai4_proc_count[i4_curr_grp_num];
1361*c83a76b0SSuyog Pawar }
1362*c83a76b0SSuyog Pawar }
1363*c83a76b0SSuyog Pawar else
1364*c83a76b0SSuyog Pawar {
1365*c83a76b0SSuyog Pawar s_thread_attr.core_affinity_mask = 0;
1366*c83a76b0SSuyog Pawar if((enc_ctr >= i4_acc_proc_num) &&
1367*c83a76b0SSuyog Pawar (ps_enc_ctxt_base->ps_stat_prms->s_multi_thrd_prms.i4_num_proc_groups > 1))
1368*c83a76b0SSuyog Pawar {
1369*c83a76b0SSuyog Pawar /*** When the cores in the Group0 is exhausted start enc threads in the next Processor Group ***/
1370*c83a76b0SSuyog Pawar s_thread_attr.group_num++;
1371*c83a76b0SSuyog Pawar i4_curr_grp_num++;
1372*c83a76b0SSuyog Pawar /* This takes care of the condition that differnt proc groups can have diff number of cores */
1373*c83a76b0SSuyog Pawar i4_acc_proc_num += ai4_proc_count[i4_curr_grp_num];
1374*c83a76b0SSuyog Pawar }
1375*c83a76b0SSuyog Pawar }
1376*c83a76b0SSuyog Pawar
1377*c83a76b0SSuyog Pawar /* Create frame processing thread */
1378*c83a76b0SSuyog Pawar apv_enc_frm_proc_hdls[res_ctr][ctr] =
1379*c83a76b0SSuyog Pawar osal_thread_create(ps_hle_ctxt->pv_osal_handle, &s_thread_attr);
1380*c83a76b0SSuyog Pawar if(NULL == apv_enc_frm_proc_hdls[res_ctr][ctr])
1381*c83a76b0SSuyog Pawar {
1382*c83a76b0SSuyog Pawar return IV_FAIL;
1383*c83a76b0SSuyog Pawar }
1384*c83a76b0SSuyog Pawar enc_ctr++;
1385*c83a76b0SSuyog Pawar }
1386*c83a76b0SSuyog Pawar }
1387*c83a76b0SSuyog Pawar
1388*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
1389*c83a76b0SSuyog Pawar /* Create all Pre - Encode Frame processing threads */
1390*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
1391*c83a76b0SSuyog Pawar for(res_ctr = 0; res_ctr < i4_num_resolutions; res_ctr++)
1392*c83a76b0SSuyog Pawar {
1393*c83a76b0SSuyog Pawar WORD32 pre_enc_ctr = 0;
1394*c83a76b0SSuyog Pawar WORD32 i4_loop_count;
1395*c83a76b0SSuyog Pawar WORD32 i4_curr_grp_num = 0;
1396*c83a76b0SSuyog Pawar ps_enc_ctxt = (enc_ctxt_t *)ps_hle_ctxt->apv_enc_hdl[res_ctr];
1397*c83a76b0SSuyog Pawar
1398*c83a76b0SSuyog Pawar i4_acc_proc_num = 0;
1399*c83a76b0SSuyog Pawar
1400*c83a76b0SSuyog Pawar for(i4_loop_count = 0; i4_loop_count < res_ctr; i4_loop_count++)
1401*c83a76b0SSuyog Pawar pre_enc_ctr += ps_hle_ctxt->ai4_num_core_per_res[i4_loop_count];
1402*c83a76b0SSuyog Pawar if(ps_enc_ctxt->s_multi_thrd.i4_all_thrds_active_flag)
1403*c83a76b0SSuyog Pawar {
1404*c83a76b0SSuyog Pawar /* If its sequential mode of operation enc and pre-enc threads to be given same core affinity mask */
1405*c83a76b0SSuyog Pawar pre_enc_ctr -= ps_enc_ctxt->s_multi_thrd.i4_num_enc_proc_thrds;
1406*c83a76b0SSuyog Pawar }
1407*c83a76b0SSuyog Pawar
1408*c83a76b0SSuyog Pawar if(ps_enc_ctxt_base->ps_stat_prms->s_multi_thrd_prms.i4_num_proc_groups > 1)
1409*c83a76b0SSuyog Pawar {
1410*c83a76b0SSuyog Pawar /* Select the group number for each res based on processors present in each group */
1411*c83a76b0SSuyog Pawar for(i4_loop_count = 0;
1412*c83a76b0SSuyog Pawar i4_loop_count <
1413*c83a76b0SSuyog Pawar ps_enc_ctxt_base->ps_stat_prms->s_multi_thrd_prms.i4_num_proc_groups;
1414*c83a76b0SSuyog Pawar i4_loop_count++)
1415*c83a76b0SSuyog Pawar {
1416*c83a76b0SSuyog Pawar i4_acc_proc_num += ai4_proc_count[i4_loop_count];
1417*c83a76b0SSuyog Pawar if((pre_enc_ctr + ps_enc_ctxt->s_multi_thrd.i4_num_enc_proc_thrds) >=
1418*c83a76b0SSuyog Pawar i4_acc_proc_num)
1419*c83a76b0SSuyog Pawar {
1420*c83a76b0SSuyog Pawar /* if pre_enc_ctr is greater than proc count for first group,
1421*c83a76b0SSuyog Pawar then increment group count.This group number will be starting grp num for
1422*c83a76b0SSuyog Pawar that resolution */
1423*c83a76b0SSuyog Pawar i4_curr_grp_num++;
1424*c83a76b0SSuyog Pawar }
1425*c83a76b0SSuyog Pawar else
1426*c83a76b0SSuyog Pawar break;
1427*c83a76b0SSuyog Pawar }
1428*c83a76b0SSuyog Pawar }
1429*c83a76b0SSuyog Pawar
1430*c83a76b0SSuyog Pawar for(ctr = 0; ctr < ps_enc_ctxt->s_multi_thrd.i4_num_pre_enc_proc_thrds; ctr++)
1431*c83a76b0SSuyog Pawar {
1432*c83a76b0SSuyog Pawar osal_thread_attr_t s_thread_attr = OSAL_DEFAULT_THREAD_ATTR;
1433*c83a76b0SSuyog Pawar
1434*c83a76b0SSuyog Pawar s_memtab.e_mem_type = IV_EXT_CACHEABLE_NORMAL_MEM;
1435*c83a76b0SSuyog Pawar s_memtab.i4_mem_size = sizeof(frm_proc_thrd_ctxt_t);
1436*c83a76b0SSuyog Pawar
1437*c83a76b0SSuyog Pawar ps_hle_ctxt->ihevce_mem_alloc(
1438*c83a76b0SSuyog Pawar ps_hle_ctxt->pv_mem_mgr_hdl, &ps_enc_ctxt_base->ps_stat_prms->s_sys_api, &s_memtab);
1439*c83a76b0SSuyog Pawar if(s_memtab.pv_base == NULL)
1440*c83a76b0SSuyog Pawar {
1441*c83a76b0SSuyog Pawar return (IV_FAIL);
1442*c83a76b0SSuyog Pawar }
1443*c83a76b0SSuyog Pawar
1444*c83a76b0SSuyog Pawar aps_pre_enc_frm_proc_thrd_ctxt[res_ctr][ctr] = (frm_proc_thrd_ctxt_t *)s_memtab.pv_base;
1445*c83a76b0SSuyog Pawar
1446*c83a76b0SSuyog Pawar /* initialise the interface strucure parameters */
1447*c83a76b0SSuyog Pawar aps_pre_enc_frm_proc_thrd_ctxt[res_ctr][ctr]->i4_thrd_id = ctr;
1448*c83a76b0SSuyog Pawar
1449*c83a76b0SSuyog Pawar aps_pre_enc_frm_proc_thrd_ctxt[res_ctr][ctr]->ps_hle_ctxt = ps_hle_ctxt;
1450*c83a76b0SSuyog Pawar ps_enc_ctxt = (enc_ctxt_t *)ps_hle_ctxt->apv_enc_hdl[res_ctr];
1451*c83a76b0SSuyog Pawar aps_pre_enc_frm_proc_thrd_ctxt[res_ctr][ctr]->pv_enc_ctxt = (void *)ps_enc_ctxt;
1452*c83a76b0SSuyog Pawar
1453*c83a76b0SSuyog Pawar /* Initialize application thread attributes */
1454*c83a76b0SSuyog Pawar s_thread_attr.exit_code = 0;
1455*c83a76b0SSuyog Pawar s_thread_attr.name = 0;
1456*c83a76b0SSuyog Pawar s_thread_attr.priority_map_flag = 1;
1457*c83a76b0SSuyog Pawar s_thread_attr.priority = OSAL_PRIORITY_DEFAULT;
1458*c83a76b0SSuyog Pawar s_thread_attr.stack_addr = 0;
1459*c83a76b0SSuyog Pawar s_thread_attr.stack_size = THREAD_STACK_SIZE;
1460*c83a76b0SSuyog Pawar s_thread_attr.thread_func = ihevce_pre_enc_process_frame_thrd;
1461*c83a76b0SSuyog Pawar s_thread_attr.thread_param = (void *)(aps_pre_enc_frm_proc_thrd_ctxt[res_ctr][ctr]);
1462*c83a76b0SSuyog Pawar s_thread_attr.group_num = i4_curr_grp_num;
1463*c83a76b0SSuyog Pawar
1464*c83a76b0SSuyog Pawar if(1 == ps_enc_ctxt_base->ps_stat_prms->s_multi_thrd_prms.i4_use_thrd_affinity)
1465*c83a76b0SSuyog Pawar {
1466*c83a76b0SSuyog Pawar ihevce_static_multi_thread_params_t *ps_multi_thrd_prms =
1467*c83a76b0SSuyog Pawar &ps_enc_ctxt_base->ps_stat_prms->s_multi_thrd_prms;
1468*c83a76b0SSuyog Pawar
1469*c83a76b0SSuyog Pawar s_thread_attr.core_affinity_mask =
1470*c83a76b0SSuyog Pawar ps_multi_thrd_prms->au8_core_aff_mask
1471*c83a76b0SSuyog Pawar [pre_enc_ctr + ps_enc_ctxt->s_multi_thrd.i4_num_enc_proc_thrds];
1472*c83a76b0SSuyog Pawar if(((pre_enc_ctr + ps_enc_ctxt->s_multi_thrd.i4_num_enc_proc_thrds) >=
1473*c83a76b0SSuyog Pawar i4_acc_proc_num) &&
1474*c83a76b0SSuyog Pawar (ps_enc_ctxt_base->ps_stat_prms->s_multi_thrd_prms.i4_num_proc_groups > 1))
1475*c83a76b0SSuyog Pawar {
1476*c83a76b0SSuyog Pawar /*** When the cores in the Group0 is exhausted start enc threads in the next Processor Group ***/
1477*c83a76b0SSuyog Pawar s_thread_attr.group_num++;
1478*c83a76b0SSuyog Pawar i4_curr_grp_num++;
1479*c83a76b0SSuyog Pawar /* This takes care of the condition that differnt proc groups can have diff number of cores */
1480*c83a76b0SSuyog Pawar i4_acc_proc_num += ai4_proc_count[i4_curr_grp_num];
1481*c83a76b0SSuyog Pawar }
1482*c83a76b0SSuyog Pawar }
1483*c83a76b0SSuyog Pawar else
1484*c83a76b0SSuyog Pawar {
1485*c83a76b0SSuyog Pawar s_thread_attr.core_affinity_mask = 0;
1486*c83a76b0SSuyog Pawar
1487*c83a76b0SSuyog Pawar if(((pre_enc_ctr + ps_enc_ctxt->s_multi_thrd.i4_num_enc_proc_thrds) >=
1488*c83a76b0SSuyog Pawar i4_acc_proc_num) &&
1489*c83a76b0SSuyog Pawar (ps_enc_ctxt_base->ps_stat_prms->s_multi_thrd_prms.i4_num_proc_groups > 1))
1490*c83a76b0SSuyog Pawar {
1491*c83a76b0SSuyog Pawar /*** When the cores in the Group0 is exhausted start enc threads in the next Processor Group ***/
1492*c83a76b0SSuyog Pawar s_thread_attr.group_num++;
1493*c83a76b0SSuyog Pawar i4_curr_grp_num++;
1494*c83a76b0SSuyog Pawar /* This takes care of the condition that differnt proc groups can have diff number of cores */
1495*c83a76b0SSuyog Pawar i4_acc_proc_num += ai4_proc_count[i4_curr_grp_num];
1496*c83a76b0SSuyog Pawar }
1497*c83a76b0SSuyog Pawar }
1498*c83a76b0SSuyog Pawar
1499*c83a76b0SSuyog Pawar /* Create frame processing thread */
1500*c83a76b0SSuyog Pawar apv_pre_enc_frm_proc_hdls[res_ctr][ctr] =
1501*c83a76b0SSuyog Pawar osal_thread_create(ps_hle_ctxt->pv_osal_handle, &s_thread_attr);
1502*c83a76b0SSuyog Pawar if(NULL == apv_pre_enc_frm_proc_hdls[res_ctr][ctr])
1503*c83a76b0SSuyog Pawar {
1504*c83a76b0SSuyog Pawar return IV_FAIL;
1505*c83a76b0SSuyog Pawar }
1506*c83a76b0SSuyog Pawar pre_enc_ctr++;
1507*c83a76b0SSuyog Pawar }
1508*c83a76b0SSuyog Pawar }
1509*c83a76b0SSuyog Pawar
1510*c83a76b0SSuyog Pawar /* Set the threads init done Flag */
1511*c83a76b0SSuyog Pawar ps_hle_ctxt->i4_hle_init_done = 1;
1512*c83a76b0SSuyog Pawar
1513*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
1514*c83a76b0SSuyog Pawar /* Wait and destroy Processing threads */
1515*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
1516*c83a76b0SSuyog Pawar
1517*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
1518*c83a76b0SSuyog Pawar /* Frame process Pre - Encode threads destroy */
1519*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
1520*c83a76b0SSuyog Pawar for(res_ctr = 0; res_ctr < i4_num_resolutions; res_ctr++)
1521*c83a76b0SSuyog Pawar {
1522*c83a76b0SSuyog Pawar ps_enc_ctxt = (enc_ctxt_t *)ps_hle_ctxt->apv_enc_hdl[res_ctr];
1523*c83a76b0SSuyog Pawar
1524*c83a76b0SSuyog Pawar for(ctr = 0; ctr < ps_enc_ctxt->s_multi_thrd.i4_num_pre_enc_proc_thrds; ctr++)
1525*c83a76b0SSuyog Pawar {
1526*c83a76b0SSuyog Pawar /* Wait for thread to complete */
1527*c83a76b0SSuyog Pawar osal_thread_wait(apv_pre_enc_frm_proc_hdls[res_ctr][ctr]);
1528*c83a76b0SSuyog Pawar
1529*c83a76b0SSuyog Pawar /* Destroy thread */
1530*c83a76b0SSuyog Pawar osal_thread_destroy(apv_pre_enc_frm_proc_hdls[res_ctr][ctr]);
1531*c83a76b0SSuyog Pawar
1532*c83a76b0SSuyog Pawar s_memtab.i4_mem_size = sizeof(frm_proc_thrd_ctxt_t);
1533*c83a76b0SSuyog Pawar s_memtab.e_mem_type = IV_EXT_CACHEABLE_NORMAL_MEM;
1534*c83a76b0SSuyog Pawar s_memtab.pv_base = (void *)aps_pre_enc_frm_proc_thrd_ctxt[res_ctr][ctr];
1535*c83a76b0SSuyog Pawar
1536*c83a76b0SSuyog Pawar /* free the ctxt memory */
1537*c83a76b0SSuyog Pawar ps_hle_ctxt->ihevce_mem_free(ps_hle_ctxt->pv_mem_mgr_hdl, &s_memtab);
1538*c83a76b0SSuyog Pawar }
1539*c83a76b0SSuyog Pawar }
1540*c83a76b0SSuyog Pawar
1541*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
1542*c83a76b0SSuyog Pawar /* Frame process Encode slave threads destroy */
1543*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
1544*c83a76b0SSuyog Pawar for(res_ctr = 0; res_ctr < i4_num_resolutions; res_ctr++)
1545*c83a76b0SSuyog Pawar {
1546*c83a76b0SSuyog Pawar ps_enc_ctxt = (enc_ctxt_t *)ps_hle_ctxt->apv_enc_hdl[res_ctr];
1547*c83a76b0SSuyog Pawar
1548*c83a76b0SSuyog Pawar for(ctr = 0; ctr < ps_enc_ctxt->s_multi_thrd.i4_num_enc_proc_thrds; ctr++)
1549*c83a76b0SSuyog Pawar {
1550*c83a76b0SSuyog Pawar /* Wait for thread to complete */
1551*c83a76b0SSuyog Pawar osal_thread_wait(apv_enc_frm_proc_hdls[res_ctr][ctr]);
1552*c83a76b0SSuyog Pawar
1553*c83a76b0SSuyog Pawar /* Destroy thread */
1554*c83a76b0SSuyog Pawar osal_thread_destroy(apv_enc_frm_proc_hdls[res_ctr][ctr]);
1555*c83a76b0SSuyog Pawar
1556*c83a76b0SSuyog Pawar s_memtab.i4_mem_size = sizeof(frm_proc_thrd_ctxt_t);
1557*c83a76b0SSuyog Pawar s_memtab.e_mem_type = IV_EXT_CACHEABLE_NORMAL_MEM;
1558*c83a76b0SSuyog Pawar s_memtab.pv_base = (void *)aps_enc_frm_proc_thrd_ctxt[res_ctr][ctr];
1559*c83a76b0SSuyog Pawar
1560*c83a76b0SSuyog Pawar /* free the ctxt memory */
1561*c83a76b0SSuyog Pawar ps_hle_ctxt->ihevce_mem_free(ps_hle_ctxt->pv_mem_mgr_hdl, &s_memtab);
1562*c83a76b0SSuyog Pawar }
1563*c83a76b0SSuyog Pawar }
1564*c83a76b0SSuyog Pawar
1565*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
1566*c83a76b0SSuyog Pawar /* Entropy threads destroy */
1567*c83a76b0SSuyog Pawar /* --------------------------------------------------------------------- */
1568*c83a76b0SSuyog Pawar for(res_ctr = 0; res_ctr < i4_num_resolutions; res_ctr++)
1569*c83a76b0SSuyog Pawar {
1570*c83a76b0SSuyog Pawar WORD32 i4_num_bitrates =
1571*c83a76b0SSuyog Pawar ps_enc_ctxt_base->ps_stat_prms->s_tgt_lyr_prms.as_tgt_params[res_ctr]
1572*c83a76b0SSuyog Pawar .i4_num_bitrate_instances;
1573*c83a76b0SSuyog Pawar
1574*c83a76b0SSuyog Pawar for(ctr = 0; ctr < i4_num_bitrates; ctr++)
1575*c83a76b0SSuyog Pawar {
1576*c83a76b0SSuyog Pawar /* Wait for Entropy Coding thread to complete */
1577*c83a76b0SSuyog Pawar osal_thread_wait(apv_entropy_thrd_hdls[res_ctr][ctr]);
1578*c83a76b0SSuyog Pawar
1579*c83a76b0SSuyog Pawar /* Destroy Entropy Coding thread */
1580*c83a76b0SSuyog Pawar osal_thread_destroy(apv_entropy_thrd_hdls[res_ctr][ctr]);
1581*c83a76b0SSuyog Pawar
1582*c83a76b0SSuyog Pawar //semaphore will come here
1583*c83a76b0SSuyog Pawar
1584*c83a76b0SSuyog Pawar s_memtab.i4_mem_size = sizeof(frm_proc_thrd_ctxt_t);
1585*c83a76b0SSuyog Pawar s_memtab.e_mem_type = IV_EXT_CACHEABLE_NORMAL_MEM;
1586*c83a76b0SSuyog Pawar s_memtab.pv_base = (void *)aps_entropy_thrd_ctxt[res_ctr][ctr];
1587*c83a76b0SSuyog Pawar
1588*c83a76b0SSuyog Pawar /* free the ctxt memory */
1589*c83a76b0SSuyog Pawar ps_hle_ctxt->ihevce_mem_free(ps_hle_ctxt->pv_mem_mgr_hdl, &s_memtab);
1590*c83a76b0SSuyog Pawar }
1591*c83a76b0SSuyog Pawar }
1592*c83a76b0SSuyog Pawar
1593*c83a76b0SSuyog Pawar s_memtab.i4_mem_size = sizeof(lap_intface_t);
1594*c83a76b0SSuyog Pawar s_memtab.e_mem_type = IV_EXT_CACHEABLE_NORMAL_MEM;
1595*c83a76b0SSuyog Pawar s_memtab.pv_base = (void *)ps_lap_interface_ctxt;
1596*c83a76b0SSuyog Pawar ps_hle_ctxt->ihevce_mem_free(ps_hle_ctxt->pv_mem_mgr_hdl, &s_memtab);
1597*c83a76b0SSuyog Pawar /* profile stop */
1598*c83a76b0SSuyog Pawar PROFILE_STOP(&ps_hle_ctxt->profile_hle, NULL);
1599*c83a76b0SSuyog Pawar return (0);
1600*c83a76b0SSuyog Pawar }
1601*c83a76b0SSuyog Pawar
1602*c83a76b0SSuyog Pawar /*!
1603*c83a76b0SSuyog Pawar ******************************************************************************
1604*c83a76b0SSuyog Pawar * \if Function name : ihevce_q_get_free_inp_data_buff \endif
1605*c83a76b0SSuyog Pawar *
1606*c83a76b0SSuyog Pawar * \brief
1607*c83a76b0SSuyog Pawar * Gets a free buffer from the que requested
1608*c83a76b0SSuyog Pawar *
1609*c83a76b0SSuyog Pawar * \param[in] high level encoder context pointer
1610*c83a76b0SSuyog Pawar * \param[in] pointer to return the buffer id
1611*c83a76b0SSuyog Pawar * \param[in] blocking mode / non blocking mode
1612*c83a76b0SSuyog Pawar *
1613*c83a76b0SSuyog Pawar * \return
1614*c83a76b0SSuyog Pawar * None
1615*c83a76b0SSuyog Pawar *
1616*c83a76b0SSuyog Pawar * \author
1617*c83a76b0SSuyog Pawar * Ittiam
1618*c83a76b0SSuyog Pawar *
1619*c83a76b0SSuyog Pawar *****************************************************************************
1620*c83a76b0SSuyog Pawar */
ihevce_q_get_free_inp_data_buff(ihevce_hle_ctxt_t * ps_hle_ctxt,WORD32 * pi4_buff_id,WORD32 i4_blocking_mode)1621*c83a76b0SSuyog Pawar void *ihevce_q_get_free_inp_data_buff(
1622*c83a76b0SSuyog Pawar ihevce_hle_ctxt_t *ps_hle_ctxt, WORD32 *pi4_buff_id, WORD32 i4_blocking_mode)
1623*c83a76b0SSuyog Pawar {
1624*c83a76b0SSuyog Pawar void *pv_ptr;
1625*c83a76b0SSuyog Pawar enc_ctxt_t *ps_enc_ctxt;
1626*c83a76b0SSuyog Pawar WORD32 i4_resolution_id = 0;
1627*c83a76b0SSuyog Pawar
1628*c83a76b0SSuyog Pawar ps_enc_ctxt = (enc_ctxt_t *)ps_hle_ctxt->apv_enc_hdl[i4_resolution_id];
1629*c83a76b0SSuyog Pawar if(ps_enc_ctxt->i4_frame_limit_reached == 1)
1630*c83a76b0SSuyog Pawar {
1631*c83a76b0SSuyog Pawar return (NULL);
1632*c83a76b0SSuyog Pawar }
1633*c83a76b0SSuyog Pawar /*Input buffer is same for all enc handles*/
1634*c83a76b0SSuyog Pawar pv_ptr = ihevce_q_get_free_buff(
1635*c83a76b0SSuyog Pawar ps_hle_ctxt->apv_enc_hdl[0], IHEVCE_INPUT_DATA_CTRL_Q, pi4_buff_id, i4_blocking_mode);
1636*c83a76b0SSuyog Pawar
1637*c83a76b0SSuyog Pawar return (pv_ptr);
1638*c83a76b0SSuyog Pawar }
1639*c83a76b0SSuyog Pawar
1640*c83a76b0SSuyog Pawar /*!
1641*c83a76b0SSuyog Pawar ******************************************************************************
1642*c83a76b0SSuyog Pawar * \if Function name : ihevce_q_get_free_inp_ctrl_buff \endif
1643*c83a76b0SSuyog Pawar *
1644*c83a76b0SSuyog Pawar * \brief
1645*c83a76b0SSuyog Pawar * Gets a free buffer from the que requested
1646*c83a76b0SSuyog Pawar *
1647*c83a76b0SSuyog Pawar * \param[in] high level encoder context pointer
1648*c83a76b0SSuyog Pawar * \param[in] pointer to return the buffer id
1649*c83a76b0SSuyog Pawar * \param[in] blocking mode / non blocking mode
1650*c83a76b0SSuyog Pawar *
1651*c83a76b0SSuyog Pawar * \return
1652*c83a76b0SSuyog Pawar * None
1653*c83a76b0SSuyog Pawar *
1654*c83a76b0SSuyog Pawar * \author
1655*c83a76b0SSuyog Pawar * Ittiam
1656*c83a76b0SSuyog Pawar *
1657*c83a76b0SSuyog Pawar *****************************************************************************
1658*c83a76b0SSuyog Pawar */
ihevce_q_get_free_inp_ctrl_buff(ihevce_hle_ctxt_t * ps_hle_ctxt,WORD32 * pi4_buff_id,WORD32 i4_blocking_mode)1659*c83a76b0SSuyog Pawar void *ihevce_q_get_free_inp_ctrl_buff(
1660*c83a76b0SSuyog Pawar ihevce_hle_ctxt_t *ps_hle_ctxt, WORD32 *pi4_buff_id, WORD32 i4_blocking_mode)
1661*c83a76b0SSuyog Pawar {
1662*c83a76b0SSuyog Pawar void *pv_ptr;
1663*c83a76b0SSuyog Pawar
1664*c83a76b0SSuyog Pawar /*Input buffer is same for all enc handles*/
1665*c83a76b0SSuyog Pawar pv_ptr = ihevce_q_get_free_buff(
1666*c83a76b0SSuyog Pawar ps_hle_ctxt->apv_enc_hdl[0], IHEVCE_INPUT_ASYNCH_CTRL_Q, pi4_buff_id, i4_blocking_mode);
1667*c83a76b0SSuyog Pawar
1668*c83a76b0SSuyog Pawar return (pv_ptr);
1669*c83a76b0SSuyog Pawar }
1670*c83a76b0SSuyog Pawar
1671*c83a76b0SSuyog Pawar /*!
1672*c83a76b0SSuyog Pawar ******************************************************************************
1673*c83a76b0SSuyog Pawar * \if Function name : ihevce_q_get_free_out_strm_buff \endif
1674*c83a76b0SSuyog Pawar *
1675*c83a76b0SSuyog Pawar * \brief
1676*c83a76b0SSuyog Pawar * Gets a free buffer from the que requested
1677*c83a76b0SSuyog Pawar *
1678*c83a76b0SSuyog Pawar * \param[in] high level encoder context pointer
1679*c83a76b0SSuyog Pawar * \param[in] pointer to return the buffer id
1680*c83a76b0SSuyog Pawar * \param[in] blocking mode / non blocking mode
1681*c83a76b0SSuyog Pawar *
1682*c83a76b0SSuyog Pawar * \return
1683*c83a76b0SSuyog Pawar * None
1684*c83a76b0SSuyog Pawar *
1685*c83a76b0SSuyog Pawar * \author
1686*c83a76b0SSuyog Pawar * Ittiam
1687*c83a76b0SSuyog Pawar *
1688*c83a76b0SSuyog Pawar *****************************************************************************
1689*c83a76b0SSuyog Pawar */
ihevce_q_get_free_out_strm_buff(ihevce_hle_ctxt_t * ps_hle_ctxt,WORD32 * pi4_buff_id,WORD32 i4_blocking_mode,WORD32 i4_bitrate_instance,WORD32 i4_res_instance)1690*c83a76b0SSuyog Pawar void *ihevce_q_get_free_out_strm_buff(
1691*c83a76b0SSuyog Pawar ihevce_hle_ctxt_t *ps_hle_ctxt,
1692*c83a76b0SSuyog Pawar WORD32 *pi4_buff_id,
1693*c83a76b0SSuyog Pawar WORD32 i4_blocking_mode,
1694*c83a76b0SSuyog Pawar WORD32 i4_bitrate_instance,
1695*c83a76b0SSuyog Pawar WORD32 i4_res_instance)
1696*c83a76b0SSuyog Pawar {
1697*c83a76b0SSuyog Pawar void *pv_ptr;
1698*c83a76b0SSuyog Pawar
1699*c83a76b0SSuyog Pawar pv_ptr = ihevce_q_get_free_buff(
1700*c83a76b0SSuyog Pawar ps_hle_ctxt->apv_enc_hdl[i4_res_instance],
1701*c83a76b0SSuyog Pawar (IHEVCE_OUTPUT_DATA_Q + i4_bitrate_instance),
1702*c83a76b0SSuyog Pawar pi4_buff_id,
1703*c83a76b0SSuyog Pawar i4_blocking_mode);
1704*c83a76b0SSuyog Pawar return (pv_ptr);
1705*c83a76b0SSuyog Pawar }
1706*c83a76b0SSuyog Pawar
1707*c83a76b0SSuyog Pawar /*!
1708*c83a76b0SSuyog Pawar ******************************************************************************
1709*c83a76b0SSuyog Pawar * \if Function name : ihevce_q_get_free_out_recon_buff \endif
1710*c83a76b0SSuyog Pawar *
1711*c83a76b0SSuyog Pawar * \brief
1712*c83a76b0SSuyog Pawar * Gets a free buffer from the que requested
1713*c83a76b0SSuyog Pawar *
1714*c83a76b0SSuyog Pawar * \param[in] high level encoder context pointer
1715*c83a76b0SSuyog Pawar * \param[in] pointer to return the buffer id
1716*c83a76b0SSuyog Pawar * \param[in] blocking mode / non blocking mode
1717*c83a76b0SSuyog Pawar *
1718*c83a76b0SSuyog Pawar * \return
1719*c83a76b0SSuyog Pawar * None
1720*c83a76b0SSuyog Pawar *
1721*c83a76b0SSuyog Pawar * \author
1722*c83a76b0SSuyog Pawar * Ittiam
1723*c83a76b0SSuyog Pawar *
1724*c83a76b0SSuyog Pawar *****************************************************************************
1725*c83a76b0SSuyog Pawar */
ihevce_q_get_free_out_recon_buff(ihevce_hle_ctxt_t * ps_hle_ctxt,WORD32 * pi4_buff_id,WORD32 i4_blocking_mode,WORD32 i4_bitrate_instance,WORD32 i4_res_instance)1726*c83a76b0SSuyog Pawar void *ihevce_q_get_free_out_recon_buff(
1727*c83a76b0SSuyog Pawar ihevce_hle_ctxt_t *ps_hle_ctxt,
1728*c83a76b0SSuyog Pawar WORD32 *pi4_buff_id,
1729*c83a76b0SSuyog Pawar WORD32 i4_blocking_mode,
1730*c83a76b0SSuyog Pawar WORD32 i4_bitrate_instance,
1731*c83a76b0SSuyog Pawar WORD32 i4_res_instance)
1732*c83a76b0SSuyog Pawar {
1733*c83a76b0SSuyog Pawar void *pv_ptr;
1734*c83a76b0SSuyog Pawar
1735*c83a76b0SSuyog Pawar pv_ptr = ihevce_q_get_free_buff(
1736*c83a76b0SSuyog Pawar ps_hle_ctxt->apv_enc_hdl[i4_res_instance],
1737*c83a76b0SSuyog Pawar (IHEVCE_RECON_DATA_Q + i4_bitrate_instance),
1738*c83a76b0SSuyog Pawar pi4_buff_id,
1739*c83a76b0SSuyog Pawar i4_blocking_mode);
1740*c83a76b0SSuyog Pawar return (pv_ptr);
1741*c83a76b0SSuyog Pawar }
1742*c83a76b0SSuyog Pawar
1743*c83a76b0SSuyog Pawar /*!
1744*c83a76b0SSuyog Pawar ******************************************************************************
1745*c83a76b0SSuyog Pawar * \if Function name : ihevce_q_set_inp_data_buff_prod \endif
1746*c83a76b0SSuyog Pawar *
1747*c83a76b0SSuyog Pawar * \brief
1748*c83a76b0SSuyog Pawar * Sets the input data buffer as produced in the que requested
1749*c83a76b0SSuyog Pawar *
1750*c83a76b0SSuyog Pawar * \param[in] high level encoder context pointer
1751*c83a76b0SSuyog Pawar * \param[in] buffer id which needs to be set as produced
1752*c83a76b0SSuyog Pawar *
1753*c83a76b0SSuyog Pawar * \return
1754*c83a76b0SSuyog Pawar * None
1755*c83a76b0SSuyog Pawar *
1756*c83a76b0SSuyog Pawar * \author
1757*c83a76b0SSuyog Pawar * Ittiam
1758*c83a76b0SSuyog Pawar *
1759*c83a76b0SSuyog Pawar *****************************************************************************
1760*c83a76b0SSuyog Pawar */
1761*c83a76b0SSuyog Pawar IV_API_CALL_STATUS_T
ihevce_q_set_inp_data_buff_prod(ihevce_hle_ctxt_t * ps_hle_ctxt,WORD32 i4_buff_id)1762*c83a76b0SSuyog Pawar ihevce_q_set_inp_data_buff_prod(ihevce_hle_ctxt_t *ps_hle_ctxt, WORD32 i4_buff_id)
1763*c83a76b0SSuyog Pawar {
1764*c83a76b0SSuyog Pawar IV_API_CALL_STATUS_T ret_status;
1765*c83a76b0SSuyog Pawar
1766*c83a76b0SSuyog Pawar ret_status =
1767*c83a76b0SSuyog Pawar ihevce_q_set_buff_prod(ps_hle_ctxt->apv_enc_hdl[0], IHEVCE_INPUT_DATA_CTRL_Q, i4_buff_id);
1768*c83a76b0SSuyog Pawar
1769*c83a76b0SSuyog Pawar return (ret_status);
1770*c83a76b0SSuyog Pawar }
1771*c83a76b0SSuyog Pawar
1772*c83a76b0SSuyog Pawar /*!
1773*c83a76b0SSuyog Pawar ******************************************************************************
1774*c83a76b0SSuyog Pawar * \if Function name : ihevce_q_set_inp_ctrl_buff_prod \endif
1775*c83a76b0SSuyog Pawar *
1776*c83a76b0SSuyog Pawar * \brief
1777*c83a76b0SSuyog Pawar * Sets the input data buffer as produced in the que requested
1778*c83a76b0SSuyog Pawar *
1779*c83a76b0SSuyog Pawar * \param[in] high level encoder context pointer
1780*c83a76b0SSuyog Pawar * \param[in] buffer id which needs to be set as produced
1781*c83a76b0SSuyog Pawar *
1782*c83a76b0SSuyog Pawar * \return
1783*c83a76b0SSuyog Pawar * None
1784*c83a76b0SSuyog Pawar *
1785*c83a76b0SSuyog Pawar * \author
1786*c83a76b0SSuyog Pawar * Ittiam
1787*c83a76b0SSuyog Pawar *
1788*c83a76b0SSuyog Pawar *****************************************************************************
1789*c83a76b0SSuyog Pawar */
1790*c83a76b0SSuyog Pawar IV_API_CALL_STATUS_T
ihevce_q_set_inp_ctrl_buff_prod(ihevce_hle_ctxt_t * ps_hle_ctxt,WORD32 i4_buff_id)1791*c83a76b0SSuyog Pawar ihevce_q_set_inp_ctrl_buff_prod(ihevce_hle_ctxt_t *ps_hle_ctxt, WORD32 i4_buff_id)
1792*c83a76b0SSuyog Pawar
1793*c83a76b0SSuyog Pawar {
1794*c83a76b0SSuyog Pawar IV_API_CALL_STATUS_T ret_status;
1795*c83a76b0SSuyog Pawar
1796*c83a76b0SSuyog Pawar ret_status =
1797*c83a76b0SSuyog Pawar ihevce_q_set_buff_prod(ps_hle_ctxt->apv_enc_hdl[0], IHEVCE_INPUT_ASYNCH_CTRL_Q, i4_buff_id);
1798*c83a76b0SSuyog Pawar
1799*c83a76b0SSuyog Pawar return (ret_status);
1800*c83a76b0SSuyog Pawar }
1801*c83a76b0SSuyog Pawar
1802*c83a76b0SSuyog Pawar /*!
1803*c83a76b0SSuyog Pawar ******************************************************************************
1804*c83a76b0SSuyog Pawar * \if Function name : ihevce_q_set_out_strm_buff_prod \endif
1805*c83a76b0SSuyog Pawar *
1806*c83a76b0SSuyog Pawar * \brief
1807*c83a76b0SSuyog Pawar * Sets the Output stream buffer as produced in the que requested
1808*c83a76b0SSuyog Pawar *
1809*c83a76b0SSuyog Pawar * \param[in] high level encoder context pointer
1810*c83a76b0SSuyog Pawar * \param[in] buffer id which needs to be set as produced
1811*c83a76b0SSuyog Pawar *
1812*c83a76b0SSuyog Pawar * \return
1813*c83a76b0SSuyog Pawar * None
1814*c83a76b0SSuyog Pawar *
1815*c83a76b0SSuyog Pawar * \author
1816*c83a76b0SSuyog Pawar * Ittiam
1817*c83a76b0SSuyog Pawar *
1818*c83a76b0SSuyog Pawar *****************************************************************************
1819*c83a76b0SSuyog Pawar */
ihevce_q_set_out_strm_buff_prod(ihevce_hle_ctxt_t * ps_hle_ctxt,WORD32 i4_buff_id,WORD32 i4_bitrate_instance_id,WORD32 i4_resolution_id)1820*c83a76b0SSuyog Pawar IV_API_CALL_STATUS_T ihevce_q_set_out_strm_buff_prod(
1821*c83a76b0SSuyog Pawar ihevce_hle_ctxt_t *ps_hle_ctxt,
1822*c83a76b0SSuyog Pawar WORD32 i4_buff_id,
1823*c83a76b0SSuyog Pawar WORD32 i4_bitrate_instance_id,
1824*c83a76b0SSuyog Pawar WORD32 i4_resolution_id)
1825*c83a76b0SSuyog Pawar {
1826*c83a76b0SSuyog Pawar IV_API_CALL_STATUS_T ret_status;
1827*c83a76b0SSuyog Pawar
1828*c83a76b0SSuyog Pawar ret_status = ihevce_q_set_buff_prod(
1829*c83a76b0SSuyog Pawar ps_hle_ctxt->apv_enc_hdl[i4_resolution_id],
1830*c83a76b0SSuyog Pawar (IHEVCE_OUTPUT_DATA_Q + i4_bitrate_instance_id),
1831*c83a76b0SSuyog Pawar i4_buff_id);
1832*c83a76b0SSuyog Pawar
1833*c83a76b0SSuyog Pawar return (ret_status);
1834*c83a76b0SSuyog Pawar }
1835*c83a76b0SSuyog Pawar
1836*c83a76b0SSuyog Pawar /*!
1837*c83a76b0SSuyog Pawar ******************************************************************************
1838*c83a76b0SSuyog Pawar * \if Function name : ihevce_q_set_out_recon_buff_prod \endif
1839*c83a76b0SSuyog Pawar *
1840*c83a76b0SSuyog Pawar * \brief
1841*c83a76b0SSuyog Pawar * Sets the Output recon buffer as produced in the que requested
1842*c83a76b0SSuyog Pawar *
1843*c83a76b0SSuyog Pawar * \param[in] high level encoder context pointer
1844*c83a76b0SSuyog Pawar * \param[in] buffer id which needs to be set as produced
1845*c83a76b0SSuyog Pawar *
1846*c83a76b0SSuyog Pawar * \return
1847*c83a76b0SSuyog Pawar * None
1848*c83a76b0SSuyog Pawar *
1849*c83a76b0SSuyog Pawar * \author
1850*c83a76b0SSuyog Pawar * Ittiam
1851*c83a76b0SSuyog Pawar *
1852*c83a76b0SSuyog Pawar *****************************************************************************
1853*c83a76b0SSuyog Pawar */
ihevce_q_set_out_recon_buff_prod(ihevce_hle_ctxt_t * ps_hle_ctxt,WORD32 i4_buff_id,WORD32 i4_bitrate_instance_id,WORD32 i4_resolution_id)1854*c83a76b0SSuyog Pawar IV_API_CALL_STATUS_T ihevce_q_set_out_recon_buff_prod(
1855*c83a76b0SSuyog Pawar ihevce_hle_ctxt_t *ps_hle_ctxt,
1856*c83a76b0SSuyog Pawar WORD32 i4_buff_id,
1857*c83a76b0SSuyog Pawar WORD32 i4_bitrate_instance_id,
1858*c83a76b0SSuyog Pawar WORD32 i4_resolution_id)
1859*c83a76b0SSuyog Pawar {
1860*c83a76b0SSuyog Pawar IV_API_CALL_STATUS_T ret_status;
1861*c83a76b0SSuyog Pawar
1862*c83a76b0SSuyog Pawar ret_status = ihevce_q_set_buff_prod(
1863*c83a76b0SSuyog Pawar ps_hle_ctxt->apv_enc_hdl[i4_resolution_id],
1864*c83a76b0SSuyog Pawar (IHEVCE_RECON_DATA_Q + i4_bitrate_instance_id),
1865*c83a76b0SSuyog Pawar i4_buff_id);
1866*c83a76b0SSuyog Pawar
1867*c83a76b0SSuyog Pawar return (ret_status);
1868*c83a76b0SSuyog Pawar }
1869*c83a76b0SSuyog Pawar
1870*c83a76b0SSuyog Pawar //recon_dump
1871*c83a76b0SSuyog Pawar /*!
1872*c83a76b0SSuyog Pawar ******************************************************************************
1873*c83a76b0SSuyog Pawar * \if Function name : ihevce_q_get_filled_recon_buff \endif
1874*c83a76b0SSuyog Pawar *
1875*c83a76b0SSuyog Pawar * \brief
1876*c83a76b0SSuyog Pawar * Gets a next filled recon buffer from the que requested
1877*c83a76b0SSuyog Pawar *
1878*c83a76b0SSuyog Pawar * \param[in] high level encoder context pointer
1879*c83a76b0SSuyog Pawar * \param[in] pointer to return the buffer id
1880*c83a76b0SSuyog Pawar * \param[in] blocking mode / non blocking mode
1881*c83a76b0SSuyog Pawar *
1882*c83a76b0SSuyog Pawar * \return
1883*c83a76b0SSuyog Pawar * None
1884*c83a76b0SSuyog Pawar *
1885*c83a76b0SSuyog Pawar * \author
1886*c83a76b0SSuyog Pawar * Ittiam
1887*c83a76b0SSuyog Pawar *
1888*c83a76b0SSuyog Pawar *****************************************************************************
1889*c83a76b0SSuyog Pawar */
ihevce_q_get_filled_recon_buff(ihevce_hle_ctxt_t * ps_hle_ctxt,WORD32 * pi4_buff_id,WORD32 i4_blocking_mode,WORD32 i4_bitrate_instance_id,WORD32 i4_resolution_id)1890*c83a76b0SSuyog Pawar void *ihevce_q_get_filled_recon_buff(
1891*c83a76b0SSuyog Pawar ihevce_hle_ctxt_t *ps_hle_ctxt,
1892*c83a76b0SSuyog Pawar WORD32 *pi4_buff_id,
1893*c83a76b0SSuyog Pawar WORD32 i4_blocking_mode,
1894*c83a76b0SSuyog Pawar WORD32 i4_bitrate_instance_id,
1895*c83a76b0SSuyog Pawar WORD32 i4_resolution_id)
1896*c83a76b0SSuyog Pawar {
1897*c83a76b0SSuyog Pawar void *pv_ptr;
1898*c83a76b0SSuyog Pawar
1899*c83a76b0SSuyog Pawar pv_ptr = ihevce_q_get_filled_buff(
1900*c83a76b0SSuyog Pawar ps_hle_ctxt->apv_enc_hdl[i4_resolution_id],
1901*c83a76b0SSuyog Pawar IHEVCE_RECON_DATA_Q + i4_bitrate_instance_id,
1902*c83a76b0SSuyog Pawar pi4_buff_id,
1903*c83a76b0SSuyog Pawar i4_blocking_mode);
1904*c83a76b0SSuyog Pawar
1905*c83a76b0SSuyog Pawar return (pv_ptr);
1906*c83a76b0SSuyog Pawar }
1907*c83a76b0SSuyog Pawar
1908*c83a76b0SSuyog Pawar /*!
1909*c83a76b0SSuyog Pawar ******************************************************************************
1910*c83a76b0SSuyog Pawar * \if Function name : ihevce_q_get_filled_ctrl_sts_buff \endif
1911*c83a76b0SSuyog Pawar *
1912*c83a76b0SSuyog Pawar * \brief
1913*c83a76b0SSuyog Pawar * Gets a next filled control status buffer from the que requested
1914*c83a76b0SSuyog Pawar *
1915*c83a76b0SSuyog Pawar * \param[in] high level encoder context pointer
1916*c83a76b0SSuyog Pawar * \param[in] pointer to return the buffer id
1917*c83a76b0SSuyog Pawar * \param[in] blocking mode / non blocking mode
1918*c83a76b0SSuyog Pawar *
1919*c83a76b0SSuyog Pawar * \return
1920*c83a76b0SSuyog Pawar * None
1921*c83a76b0SSuyog Pawar *
1922*c83a76b0SSuyog Pawar * \author
1923*c83a76b0SSuyog Pawar * Ittiam
1924*c83a76b0SSuyog Pawar *
1925*c83a76b0SSuyog Pawar *****************************************************************************
1926*c83a76b0SSuyog Pawar */
ihevce_q_get_filled_ctrl_sts_buff(ihevce_hle_ctxt_t * ps_hle_ctxt,WORD32 * pi4_buff_id,WORD32 i4_blocking_mode)1927*c83a76b0SSuyog Pawar void *ihevce_q_get_filled_ctrl_sts_buff(
1928*c83a76b0SSuyog Pawar ihevce_hle_ctxt_t *ps_hle_ctxt, WORD32 *pi4_buff_id, WORD32 i4_blocking_mode)
1929*c83a76b0SSuyog Pawar {
1930*c83a76b0SSuyog Pawar void *pv_ptr;
1931*c83a76b0SSuyog Pawar pv_ptr = ihevce_q_get_filled_buff(
1932*c83a76b0SSuyog Pawar ps_hle_ctxt->apv_enc_hdl[0], IHEVCE_OUTPUT_STATUS_Q, pi4_buff_id, i4_blocking_mode);
1933*c83a76b0SSuyog Pawar
1934*c83a76b0SSuyog Pawar return (pv_ptr);
1935*c83a76b0SSuyog Pawar }
1936*c83a76b0SSuyog Pawar
1937*c83a76b0SSuyog Pawar //recon_dump
1938*c83a76b0SSuyog Pawar /*!
1939*c83a76b0SSuyog Pawar ******************************************************************************
1940*c83a76b0SSuyog Pawar * \if Function name : ihevce_q_rel_recon_buf \endif
1941*c83a76b0SSuyog Pawar *
1942*c83a76b0SSuyog Pawar * \brief
1943*c83a76b0SSuyog Pawar * Frees the recon buffer in the recon buffer que
1944*c83a76b0SSuyog Pawar *
1945*c83a76b0SSuyog Pawar * \param[in] high level encoder context pointer
1946*c83a76b0SSuyog Pawar * \param[in] buffer id which needs to be freed
1947*c83a76b0SSuyog Pawar *
1948*c83a76b0SSuyog Pawar * \return
1949*c83a76b0SSuyog Pawar * None
1950*c83a76b0SSuyog Pawar *
1951*c83a76b0SSuyog Pawar * \author
1952*c83a76b0SSuyog Pawar * Ittiam
1953*c83a76b0SSuyog Pawar *
1954*c83a76b0SSuyog Pawar *****************************************************************************
1955*c83a76b0SSuyog Pawar */
ihevce_q_rel_recon_buf(ihevce_hle_ctxt_t * ps_hle_ctxt,WORD32 i4_buff_id,WORD32 i4_bitrate_instance_id,WORD32 i4_resolution_id)1956*c83a76b0SSuyog Pawar IV_API_CALL_STATUS_T ihevce_q_rel_recon_buf(
1957*c83a76b0SSuyog Pawar ihevce_hle_ctxt_t *ps_hle_ctxt,
1958*c83a76b0SSuyog Pawar WORD32 i4_buff_id,
1959*c83a76b0SSuyog Pawar WORD32 i4_bitrate_instance_id,
1960*c83a76b0SSuyog Pawar WORD32 i4_resolution_id)
1961*c83a76b0SSuyog Pawar {
1962*c83a76b0SSuyog Pawar IV_API_CALL_STATUS_T ret_status;
1963*c83a76b0SSuyog Pawar
1964*c83a76b0SSuyog Pawar ret_status = ihevce_q_rel_buf(
1965*c83a76b0SSuyog Pawar ps_hle_ctxt->apv_enc_hdl[i4_resolution_id],
1966*c83a76b0SSuyog Pawar IHEVCE_RECON_DATA_Q + i4_bitrate_instance_id,
1967*c83a76b0SSuyog Pawar i4_buff_id);
1968*c83a76b0SSuyog Pawar
1969*c83a76b0SSuyog Pawar return (ret_status);
1970*c83a76b0SSuyog Pawar }
1971*c83a76b0SSuyog Pawar
1972*c83a76b0SSuyog Pawar /*!
1973*c83a76b0SSuyog Pawar ******************************************************************************
1974*c83a76b0SSuyog Pawar * \if Function name : ihevce_q_rel_ctrl_sts_buf \endif
1975*c83a76b0SSuyog Pawar *
1976*c83a76b0SSuyog Pawar * \brief
1977*c83a76b0SSuyog Pawar * Frees the output control sttus buffer in buffer que
1978*c83a76b0SSuyog Pawar *
1979*c83a76b0SSuyog Pawar * \param[in] high level encoder context pointer
1980*c83a76b0SSuyog Pawar * \param[in] buffer id which needs to be freed
1981*c83a76b0SSuyog Pawar *
1982*c83a76b0SSuyog Pawar * \return
1983*c83a76b0SSuyog Pawar * None
1984*c83a76b0SSuyog Pawar *
1985*c83a76b0SSuyog Pawar * \author
1986*c83a76b0SSuyog Pawar * Ittiam
1987*c83a76b0SSuyog Pawar *
1988*c83a76b0SSuyog Pawar *****************************************************************************
1989*c83a76b0SSuyog Pawar */
ihevce_q_rel_ctrl_sts_buf(ihevce_hle_ctxt_t * ps_hle_ctxt,WORD32 i4_buff_id)1990*c83a76b0SSuyog Pawar IV_API_CALL_STATUS_T ihevce_q_rel_ctrl_sts_buf(ihevce_hle_ctxt_t *ps_hle_ctxt, WORD32 i4_buff_id)
1991*c83a76b0SSuyog Pawar {
1992*c83a76b0SSuyog Pawar IV_API_CALL_STATUS_T ret_status;
1993*c83a76b0SSuyog Pawar
1994*c83a76b0SSuyog Pawar ret_status = ihevce_q_rel_buf(ps_hle_ctxt->apv_enc_hdl[0], IHEVCE_OUTPUT_STATUS_Q, i4_buff_id);
1995*c83a76b0SSuyog Pawar
1996*c83a76b0SSuyog Pawar return (ret_status);
1997*c83a76b0SSuyog Pawar }
1998*c83a76b0SSuyog Pawar
1999*c83a76b0SSuyog Pawar /*!
2000*c83a76b0SSuyog Pawar ******************************************************************************
2001*c83a76b0SSuyog Pawar * \if Function name : ihevce_hle_interface_delete \endif
2002*c83a76b0SSuyog Pawar *
2003*c83a76b0SSuyog Pawar * \brief
2004*c83a76b0SSuyog Pawar * High leve encoder delete interface
2005*c83a76b0SSuyog Pawar *
2006*c83a76b0SSuyog Pawar * \param[in] high level encoder interface context pointer
2007*c83a76b0SSuyog Pawar *
2008*c83a76b0SSuyog Pawar * \return
2009*c83a76b0SSuyog Pawar * None
2010*c83a76b0SSuyog Pawar *
2011*c83a76b0SSuyog Pawar * \author
2012*c83a76b0SSuyog Pawar * Ittiam
2013*c83a76b0SSuyog Pawar *
2014*c83a76b0SSuyog Pawar *****************************************************************************
2015*c83a76b0SSuyog Pawar */
ihevce_hle_interface_delete(ihevce_hle_ctxt_t * ps_hle_ctxt)2016*c83a76b0SSuyog Pawar IV_API_CALL_STATUS_T ihevce_hle_interface_delete(ihevce_hle_ctxt_t *ps_hle_ctxt)
2017*c83a76b0SSuyog Pawar {
2018*c83a76b0SSuyog Pawar /* local varaibles */
2019*c83a76b0SSuyog Pawar enc_ctxt_t *ps_enc_ctxt;
2020*c83a76b0SSuyog Pawar iv_mem_rec_t s_memtab;
2021*c83a76b0SSuyog Pawar WORD32 ctr = 0, i, res_ctr, i4_num_resolutions;
2022*c83a76b0SSuyog Pawar WORD32 ai4_num_bitrate_instances[IHEVCE_MAX_NUM_RESOLUTIONS] = { 1 };
2023*c83a76b0SSuyog Pawar
2024*c83a76b0SSuyog Pawar i4_num_resolutions = ps_hle_ctxt->ps_static_cfg_prms->s_tgt_lyr_prms.i4_num_res_layers;
2025*c83a76b0SSuyog Pawar for(ctr = 0; ctr < i4_num_resolutions; ctr++)
2026*c83a76b0SSuyog Pawar {
2027*c83a76b0SSuyog Pawar ai4_num_bitrate_instances[ctr] =
2028*c83a76b0SSuyog Pawar ps_hle_ctxt->ps_static_cfg_prms->s_tgt_lyr_prms.as_tgt_params[ctr]
2029*c83a76b0SSuyog Pawar .i4_num_bitrate_instances;
2030*c83a76b0SSuyog Pawar }
2031*c83a76b0SSuyog Pawar
2032*c83a76b0SSuyog Pawar for(res_ctr = 0; res_ctr < i4_num_resolutions && ps_hle_ctxt->apv_enc_hdl[res_ctr]; res_ctr++)
2033*c83a76b0SSuyog Pawar {
2034*c83a76b0SSuyog Pawar ps_enc_ctxt = (enc_ctxt_t *)ps_hle_ctxt->apv_enc_hdl[res_ctr];
2035*c83a76b0SSuyog Pawar
2036*c83a76b0SSuyog Pawar if(res_ctr == 0)
2037*c83a76b0SSuyog Pawar {
2038*c83a76b0SSuyog Pawar osal_sem_destroy(ps_enc_ctxt->s_thrd_sem_ctxt.pv_lap_sem_handle);
2039*c83a76b0SSuyog Pawar osal_sem_destroy(ps_enc_ctxt->s_thrd_sem_ctxt.pv_inp_data_sem_handle);
2040*c83a76b0SSuyog Pawar osal_sem_destroy(ps_enc_ctxt->s_thrd_sem_ctxt.pv_inp_ctrl_sem_handle);
2041*c83a76b0SSuyog Pawar if(1 == ps_hle_ctxt->ps_static_cfg_prms->s_tgt_lyr_prms.i4_mres_single_out)
2042*c83a76b0SSuyog Pawar {
2043*c83a76b0SSuyog Pawar osal_sem_destroy(ps_enc_ctxt->s_thrd_sem_ctxt.pv_ent_common_mres_sem_hdl);
2044*c83a76b0SSuyog Pawar osal_sem_destroy(ps_enc_ctxt->s_thrd_sem_ctxt.pv_out_common_mres_sem_hdl);
2045*c83a76b0SSuyog Pawar }
2046*c83a76b0SSuyog Pawar }
2047*c83a76b0SSuyog Pawar
2048*c83a76b0SSuyog Pawar osal_sem_destroy(ps_enc_ctxt->s_thrd_sem_ctxt.pv_lap_inp_data_sem_hdl);
2049*c83a76b0SSuyog Pawar osal_sem_destroy(ps_enc_ctxt->s_thrd_sem_ctxt.pv_preenc_inp_data_sem_hdl);
2050*c83a76b0SSuyog Pawar
2051*c83a76b0SSuyog Pawar osal_sem_destroy(ps_enc_ctxt->s_thrd_sem_ctxt.pv_enc_frm_proc_sem_handle);
2052*c83a76b0SSuyog Pawar osal_sem_destroy(ps_enc_ctxt->s_thrd_sem_ctxt.pv_pre_enc_frm_proc_sem_handle);
2053*c83a76b0SSuyog Pawar
2054*c83a76b0SSuyog Pawar osal_sem_destroy(ps_enc_ctxt->s_thrd_sem_ctxt.pv_out_ctrl_sem_handle);
2055*c83a76b0SSuyog Pawar
2056*c83a76b0SSuyog Pawar for(i = 0; i < ps_hle_ctxt->ps_static_cfg_prms->s_tgt_lyr_prms.as_tgt_params[res_ctr]
2057*c83a76b0SSuyog Pawar .i4_num_bitrate_instances;
2058*c83a76b0SSuyog Pawar i++)
2059*c83a76b0SSuyog Pawar {
2060*c83a76b0SSuyog Pawar osal_sem_destroy(ps_enc_ctxt->s_thrd_sem_ctxt.apv_ent_cod_sem_handle[i]);
2061*c83a76b0SSuyog Pawar osal_sem_destroy(ps_enc_ctxt->s_thrd_sem_ctxt.apv_out_strm_sem_handle[i]);
2062*c83a76b0SSuyog Pawar osal_sem_destroy(ps_enc_ctxt->s_thrd_sem_ctxt.apv_out_recon_sem_handle[i]);
2063*c83a76b0SSuyog Pawar }
2064*c83a76b0SSuyog Pawar
2065*c83a76b0SSuyog Pawar /* destroy the mutex allocated for job queue usage encode group */
2066*c83a76b0SSuyog Pawar osal_mutex_destroy(ps_enc_ctxt->s_multi_thrd.pv_job_q_mutex_hdl_enc_grp_me);
2067*c83a76b0SSuyog Pawar
2068*c83a76b0SSuyog Pawar /* destroy the mutex allocated for job queue usage encode group */
2069*c83a76b0SSuyog Pawar osal_mutex_destroy(ps_enc_ctxt->s_multi_thrd.pv_job_q_mutex_hdl_enc_grp_enc_loop);
2070*c83a76b0SSuyog Pawar
2071*c83a76b0SSuyog Pawar /* destroy the mutexes allocated for enc thread group */
2072*c83a76b0SSuyog Pawar for(i = 0; i < MAX_NUM_ME_PARALLEL; i++)
2073*c83a76b0SSuyog Pawar {
2074*c83a76b0SSuyog Pawar osal_mutex_destroy(ps_enc_ctxt->s_multi_thrd.apv_mutex_handle[i]);
2075*c83a76b0SSuyog Pawar
2076*c83a76b0SSuyog Pawar osal_mutex_destroy(ps_enc_ctxt->s_multi_thrd.apv_mutex_handle_me_end[i]);
2077*c83a76b0SSuyog Pawar }
2078*c83a76b0SSuyog Pawar
2079*c83a76b0SSuyog Pawar for(i = 0; i < MAX_NUM_ENC_LOOP_PARALLEL; i++)
2080*c83a76b0SSuyog Pawar {
2081*c83a76b0SSuyog Pawar osal_mutex_destroy(ps_enc_ctxt->s_multi_thrd.apv_mutex_handle_frame_init[i]);
2082*c83a76b0SSuyog Pawar
2083*c83a76b0SSuyog Pawar osal_mutex_destroy(ps_enc_ctxt->s_multi_thrd.apv_post_enc_mutex_handle[i]);
2084*c83a76b0SSuyog Pawar }
2085*c83a76b0SSuyog Pawar
2086*c83a76b0SSuyog Pawar /* destroy the mutex allocated for job queue, init and de-init
2087*c83a76b0SSuyog Pawar usage pre enocde group */
2088*c83a76b0SSuyog Pawar osal_mutex_destroy(ps_enc_ctxt->s_multi_thrd.pv_job_q_mutex_hdl_pre_enc_decomp);
2089*c83a76b0SSuyog Pawar osal_mutex_destroy(ps_enc_ctxt->s_multi_thrd.pv_job_q_mutex_hdl_pre_enc_hme);
2090*c83a76b0SSuyog Pawar osal_mutex_destroy(ps_enc_ctxt->s_multi_thrd.pv_job_q_mutex_hdl_pre_enc_l0ipe);
2091*c83a76b0SSuyog Pawar osal_mutex_destroy(ps_enc_ctxt->s_multi_thrd.pv_mutex_hdl_pre_enc_init);
2092*c83a76b0SSuyog Pawar osal_mutex_destroy(ps_enc_ctxt->s_multi_thrd.pv_mutex_hdl_pre_enc_decomp_deinit);
2093*c83a76b0SSuyog Pawar osal_mutex_destroy(ps_enc_ctxt->s_multi_thrd.pv_mutex_hdl_pre_enc_hme_init);
2094*c83a76b0SSuyog Pawar osal_mutex_destroy(ps_enc_ctxt->s_multi_thrd.pv_mutex_hdl_pre_enc_hme_deinit);
2095*c83a76b0SSuyog Pawar osal_mutex_destroy(ps_enc_ctxt->s_multi_thrd.pv_mutex_hdl_l0_ipe_init);
2096*c83a76b0SSuyog Pawar osal_mutex_destroy(ps_enc_ctxt->s_multi_thrd.pv_mutex_hdl_pre_enc_deinit);
2097*c83a76b0SSuyog Pawar
2098*c83a76b0SSuyog Pawar /* destroy the EncLoop Module */
2099*c83a76b0SSuyog Pawar /* Note : Only Destroys the resources allocated in the module like */
2100*c83a76b0SSuyog Pawar /* semaphore,etc. Memory free is done separately using memtabs */
2101*c83a76b0SSuyog Pawar ihevce_enc_loop_delete(ps_enc_ctxt->s_module_ctxt.pv_enc_loop_ctxt);
2102*c83a76b0SSuyog Pawar
2103*c83a76b0SSuyog Pawar /* destroy the Coarse ME Module */
2104*c83a76b0SSuyog Pawar /* Note : Only Destroys the resources allocated in the module like */
2105*c83a76b0SSuyog Pawar /* semaphore,etc. Memory free is done separately using memtabs */
2106*c83a76b0SSuyog Pawar ihevce_coarse_me_delete(
2107*c83a76b0SSuyog Pawar ps_enc_ctxt->s_module_ctxt.pv_coarse_me_ctxt,
2108*c83a76b0SSuyog Pawar ps_hle_ctxt->ps_static_cfg_prms,
2109*c83a76b0SSuyog Pawar ps_enc_ctxt->i4_resolution_id);
2110*c83a76b0SSuyog Pawar /* destroy semaphores for all the threads in pre-enc and enc */
2111*c83a76b0SSuyog Pawar for(ctr = 0; ctr < ps_enc_ctxt->s_multi_thrd.i4_num_enc_proc_thrds; ctr++)
2112*c83a76b0SSuyog Pawar {
2113*c83a76b0SSuyog Pawar osal_sem_destroy(ps_enc_ctxt->s_multi_thrd.apv_enc_thrd_sem_handle[ctr]);
2114*c83a76b0SSuyog Pawar }
2115*c83a76b0SSuyog Pawar
2116*c83a76b0SSuyog Pawar for(ctr = 0; ctr < ps_enc_ctxt->s_multi_thrd.i4_num_pre_enc_proc_thrds; ctr++)
2117*c83a76b0SSuyog Pawar {
2118*c83a76b0SSuyog Pawar osal_sem_destroy(ps_enc_ctxt->s_multi_thrd.apv_pre_enc_thrd_sem_handle[ctr]);
2119*c83a76b0SSuyog Pawar }
2120*c83a76b0SSuyog Pawar
2121*c83a76b0SSuyog Pawar /* destroy the ME-EncLoop Dep Mngr */
2122*c83a76b0SSuyog Pawar /* Note : Only Destroys the resources allocated in the module like */
2123*c83a76b0SSuyog Pawar /* semaphore,etc. Memory free is done separately using memtabs */
2124*c83a76b0SSuyog Pawar for(ctr = 0; ctr < NUM_ME_ENC_BUFS; ctr++)
2125*c83a76b0SSuyog Pawar {
2126*c83a76b0SSuyog Pawar ihevce_dmgr_del(ps_enc_ctxt->s_multi_thrd.apv_dep_mngr_encloop_dep_me[ctr]);
2127*c83a76b0SSuyog Pawar }
2128*c83a76b0SSuyog Pawar /* destroy the Prev. frame EncLoop Done Dep Mngr */
2129*c83a76b0SSuyog Pawar /* Note : Only Destroys the resources allocated in the module like */
2130*c83a76b0SSuyog Pawar /* semaphore,etc. Memory free is done separately using memtabs */
2131*c83a76b0SSuyog Pawar for(i = 0; i < ps_enc_ctxt->s_multi_thrd.i4_num_enc_loop_frm_pllel; i++)
2132*c83a76b0SSuyog Pawar {
2133*c83a76b0SSuyog Pawar ihevce_dmgr_del(ps_enc_ctxt->s_multi_thrd.apv_dep_mngr_prev_frame_done[i]);
2134*c83a76b0SSuyog Pawar }
2135*c83a76b0SSuyog Pawar /* destroy the Prev. frame EncLoop Done for re-encode Dep Mngr */
2136*c83a76b0SSuyog Pawar ihevce_dmgr_del(ps_enc_ctxt->s_multi_thrd.pv_dep_mngr_prev_frame_enc_done_for_reenc);
2137*c83a76b0SSuyog Pawar
2138*c83a76b0SSuyog Pawar /* destroy the Prev. frame ME Done Dep Mngr */
2139*c83a76b0SSuyog Pawar /* Note : Only Destroys the resources allocated in the module like */
2140*c83a76b0SSuyog Pawar /* semaphore,etc. Memory free is done separately using memtabs */
2141*c83a76b0SSuyog Pawar for(i = 0; i < ps_enc_ctxt->s_multi_thrd.i4_num_me_frm_pllel; i++)
2142*c83a76b0SSuyog Pawar {
2143*c83a76b0SSuyog Pawar ihevce_dmgr_del(ps_enc_ctxt->s_multi_thrd.apv_dep_mngr_prev_frame_me_done[i]);
2144*c83a76b0SSuyog Pawar }
2145*c83a76b0SSuyog Pawar
2146*c83a76b0SSuyog Pawar /* destroy the Prev. frame PreEnc L1 Done Dep Mngr */
2147*c83a76b0SSuyog Pawar /* Note : Only Destroys the resources allocated in the module like */
2148*c83a76b0SSuyog Pawar /* semaphore,etc. Memory free is done separately using memtabs */
2149*c83a76b0SSuyog Pawar ihevce_dmgr_del(ps_enc_ctxt->s_multi_thrd.pv_dep_mngr_prev_frame_pre_enc_l1);
2150*c83a76b0SSuyog Pawar
2151*c83a76b0SSuyog Pawar /* destroy the Prev. frame PreEnc HME Done Dep Mngr */
2152*c83a76b0SSuyog Pawar /* Note : Only Destroys the resources allocated in the module like */
2153*c83a76b0SSuyog Pawar /* semaphore,etc. Memory free is done separately using memtabs */
2154*c83a76b0SSuyog Pawar ihevce_dmgr_del(ps_enc_ctxt->s_multi_thrd.pv_dep_mngr_prev_frame_pre_enc_coarse_me);
2155*c83a76b0SSuyog Pawar
2156*c83a76b0SSuyog Pawar /* destroy the Prev. frame PreEnc L0 Done Dep Mngr */
2157*c83a76b0SSuyog Pawar /* Note : Only Destroys the resources allocated in the module like */
2158*c83a76b0SSuyog Pawar /* semaphore,etc. Memory free is done separately using memtabs */
2159*c83a76b0SSuyog Pawar ihevce_dmgr_del(ps_enc_ctxt->s_multi_thrd.pv_dep_mngr_prev_frame_pre_enc_l0);
2160*c83a76b0SSuyog Pawar
2161*c83a76b0SSuyog Pawar /* destroy the ME-Prev Recon Dep Mngr */
2162*c83a76b0SSuyog Pawar /* Note : Only Destroys the resources allocated in the module like */
2163*c83a76b0SSuyog Pawar /* semaphore,etc. Memory free is done separately using memtabs */
2164*c83a76b0SSuyog Pawar for(ctr = 0; ctr < ps_enc_ctxt->ai4_num_buf_recon_q[0]; ctr++)
2165*c83a76b0SSuyog Pawar {
2166*c83a76b0SSuyog Pawar ihevce_dmgr_del(ps_enc_ctxt->pps_recon_buf_q[0][ctr]->pv_dep_mngr_recon);
2167*c83a76b0SSuyog Pawar }
2168*c83a76b0SSuyog Pawar
2169*c83a76b0SSuyog Pawar /* destroy all the mutex created */
2170*c83a76b0SSuyog Pawar if(res_ctr == 0)
2171*c83a76b0SSuyog Pawar {
2172*c83a76b0SSuyog Pawar if(NULL != ps_enc_ctxt->s_enc_ques.pv_q_mutex_hdl)
2173*c83a76b0SSuyog Pawar {
2174*c83a76b0SSuyog Pawar osal_mutex_destroy(ps_enc_ctxt->s_enc_ques.pv_q_mutex_hdl);
2175*c83a76b0SSuyog Pawar }
2176*c83a76b0SSuyog Pawar }
2177*c83a76b0SSuyog Pawar
2178*c83a76b0SSuyog Pawar if(NULL != ps_enc_ctxt->pv_rc_mutex_lock_hdl)
2179*c83a76b0SSuyog Pawar {
2180*c83a76b0SSuyog Pawar osal_mutex_destroy(ps_enc_ctxt->pv_rc_mutex_lock_hdl);
2181*c83a76b0SSuyog Pawar }
2182*c83a76b0SSuyog Pawar
2183*c83a76b0SSuyog Pawar if(NULL != ps_enc_ctxt->s_multi_thrd.pv_sub_pic_rc_mutex_lock_hdl)
2184*c83a76b0SSuyog Pawar {
2185*c83a76b0SSuyog Pawar osal_mutex_destroy(ps_enc_ctxt->s_multi_thrd.pv_sub_pic_rc_mutex_lock_hdl);
2186*c83a76b0SSuyog Pawar }
2187*c83a76b0SSuyog Pawar
2188*c83a76b0SSuyog Pawar if(NULL != ps_enc_ctxt->s_multi_thrd.pv_sub_pic_rc_for_qp_update_mutex_lock_hdl)
2189*c83a76b0SSuyog Pawar {
2190*c83a76b0SSuyog Pawar osal_mutex_destroy(
2191*c83a76b0SSuyog Pawar ps_enc_ctxt->s_multi_thrd.pv_sub_pic_rc_for_qp_update_mutex_lock_hdl);
2192*c83a76b0SSuyog Pawar }
2193*c83a76b0SSuyog Pawar
2194*c83a76b0SSuyog Pawar /* call the memrory free function */
2195*c83a76b0SSuyog Pawar ihevce_mem_manager_free(ps_enc_ctxt, ps_hle_ctxt);
2196*c83a76b0SSuyog Pawar if((1 == ps_hle_ctxt->ps_static_cfg_prms->s_tgt_lyr_prms.i4_mres_single_out) &&
2197*c83a76b0SSuyog Pawar (res_ctr == 0))
2198*c83a76b0SSuyog Pawar {
2199*c83a76b0SSuyog Pawar s_memtab.i4_mem_size = sizeof(WORD32) * IHEVCE_MAX_NUM_RESOLUTIONS;
2200*c83a76b0SSuyog Pawar s_memtab.i4_mem_alignment = 4;
2201*c83a76b0SSuyog Pawar s_memtab.i4_size = sizeof(iv_mem_rec_t);
2202*c83a76b0SSuyog Pawar s_memtab.e_mem_type = IV_EXT_CACHEABLE_NORMAL_MEM;
2203*c83a76b0SSuyog Pawar s_memtab.pv_base = ps_enc_ctxt->s_multi_thrd.pi4_active_res_id;
2204*c83a76b0SSuyog Pawar /* free active_res_id memory */
2205*c83a76b0SSuyog Pawar ps_hle_ctxt->ihevce_mem_free(ps_hle_ctxt->pv_mem_mgr_hdl, &s_memtab);
2206*c83a76b0SSuyog Pawar }
2207*c83a76b0SSuyog Pawar if(res_ctr == (i4_num_resolutions - 1))
2208*c83a76b0SSuyog Pawar {
2209*c83a76b0SSuyog Pawar s_memtab.i4_mem_size = sizeof(ihevce_static_cfg_params_t);
2210*c83a76b0SSuyog Pawar s_memtab.i4_mem_alignment = 4;
2211*c83a76b0SSuyog Pawar s_memtab.i4_size = sizeof(iv_mem_rec_t);
2212*c83a76b0SSuyog Pawar s_memtab.e_mem_type = IV_EXT_CACHEABLE_NORMAL_MEM;
2213*c83a76b0SSuyog Pawar s_memtab.pv_base = ps_enc_ctxt->ps_stat_prms;
2214*c83a76b0SSuyog Pawar
2215*c83a76b0SSuyog Pawar /* free the encoder context pointer */
2216*c83a76b0SSuyog Pawar ps_hle_ctxt->ihevce_mem_free(ps_hle_ctxt->pv_mem_mgr_hdl, &s_memtab);
2217*c83a76b0SSuyog Pawar }
2218*c83a76b0SSuyog Pawar s_memtab.i4_mem_size = sizeof(enc_ctxt_t);
2219*c83a76b0SSuyog Pawar s_memtab.i4_mem_alignment = 4;
2220*c83a76b0SSuyog Pawar s_memtab.i4_size = sizeof(iv_mem_rec_t);
2221*c83a76b0SSuyog Pawar s_memtab.e_mem_type = IV_EXT_CACHEABLE_NORMAL_MEM;
2222*c83a76b0SSuyog Pawar s_memtab.pv_base = ps_enc_ctxt;
2223*c83a76b0SSuyog Pawar
2224*c83a76b0SSuyog Pawar /* free the encoder context pointer */
2225*c83a76b0SSuyog Pawar ps_hle_ctxt->ihevce_mem_free(ps_hle_ctxt->pv_mem_mgr_hdl, &s_memtab);
2226*c83a76b0SSuyog Pawar
2227*c83a76b0SSuyog Pawar /* reset the encoder handle to NULL */
2228*c83a76b0SSuyog Pawar ps_hle_ctxt->apv_enc_hdl[res_ctr] = NULL;
2229*c83a76b0SSuyog Pawar }
2230*c83a76b0SSuyog Pawar /* profile end */
2231*c83a76b0SSuyog Pawar PROFILE_END(&ps_hle_ctxt->profile_hle, "hle interface thread active time");
2232*c83a76b0SSuyog Pawar for(res_ctr = 0; res_ctr < i4_num_resolutions; res_ctr++)
2233*c83a76b0SSuyog Pawar {
2234*c83a76b0SSuyog Pawar WORD32 i4_br_id;
2235*c83a76b0SSuyog Pawar
2236*c83a76b0SSuyog Pawar PROFILE_END(&ps_hle_ctxt->profile_pre_enc_l1l2[res_ctr], "pre enc l1l2 process");
2237*c83a76b0SSuyog Pawar PROFILE_END(&ps_hle_ctxt->profile_pre_enc_l0ipe[res_ctr], "pre enc l0 ipe process");
2238*c83a76b0SSuyog Pawar PROFILE_END(&ps_hle_ctxt->profile_enc_me[res_ctr], "enc me process");
2239*c83a76b0SSuyog Pawar for(i4_br_id = 0; i4_br_id < ai4_num_bitrate_instances[res_ctr]; i4_br_id++)
2240*c83a76b0SSuyog Pawar {
2241*c83a76b0SSuyog Pawar PROFILE_END(&ps_hle_ctxt->profile_enc[res_ctr][i4_br_id], "enc loop process");
2242*c83a76b0SSuyog Pawar PROFILE_END(&ps_hle_ctxt->profile_entropy[res_ctr][i4_br_id], "entropy process");
2243*c83a76b0SSuyog Pawar }
2244*c83a76b0SSuyog Pawar }
2245*c83a76b0SSuyog Pawar
2246*c83a76b0SSuyog Pawar /* OSAL Delete */
2247*c83a76b0SSuyog Pawar ihevce_osal_delete((void *)ps_hle_ctxt);
2248*c83a76b0SSuyog Pawar
2249*c83a76b0SSuyog Pawar return (IV_SUCCESS);
2250*c83a76b0SSuyog Pawar }
2251